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FAN6550のメーカーはFairchild Semiconductorです、この部品の機能は「2A DDR Bus Termination Regulator」です。 |
部品番号 | FAN6550 |
| |
部品説明 | 2A DDR Bus Termination Regulator | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとFAN6550ダウンロード(pdfファイル)リンクがあります。 Total 12 pages
FAN6550
2A DDR Bus Termination Regulator
www.fairchildsemi.com
Features
• Can source and sink up to 2A continous, 3A peak
• No heatsink required
• Integrated Power MOSFETs
• Generates termination voltages for DDR SDRAM
• VREF input available for external voltage divider
• Separate voltages for VCCQ and PVDD
• Buffered VREF output
• VOUT of ±3% or less at 2A
• Minimum external components
• 0°C to 70°C operating range
• Shutdown for standby or suspend mode operation
• Thermal Shutdown ≈ 130ºC
Block Diagram
Description
The FAN6550 switching regulator is designed to convert
voltage supplies ranging from 2.3V to 4V into a desired out-
put voltage or termination voltage for DDR SDRAM mem-
ory. The FAN6550 can be implemented to produce regulated
output voltages in two different modes. In the default mode,
when the VREF pin is open, the FAN6550 output voltage is
50% of the voltage applied to VCCQ. The FAN6550 can also
be used to produce various user-defined voltages by forcing a
voltage on the VREFIN pin. In this case, the output voltage
follows the input VREFIN voltage. The switching regulator
is capable of sourcing or sinking up to 2A of current while
regulating an output VTT voltage to within 3% or less.
Transient output currents of ±3A can also be accommodated.
The FAN6550 can also be used in conjunction with series
termination resisitors to provide an excellent voltage source
for active termination schemes of high speed transmission
lines as those seen in high speed memory buses and distrib-
uted backplane designs.
15 16
14
VCCQ AVCC VREFOUT
200kΩ
VREFIN
11
200kΩ
AGND
13
–
+
VREF BUFFER
OSCILLATOR/
RAMP
GENERATOR
ERROR AMP
+
–
VFB
10
1
VDD
9
VDD
12
SHDN
27
PVDD1 PVDD2
VL1
(VOUT)
3
SQ
–
R
+
RAMP
COMPARATOR
Q
6
VL2
(VOUT)
DGND
8
PGND1 PGND2
45
REV. 1.0.2 3/11/02
1 Page PRODUCT SPECIFICATION
FAN6550
Absolute Maximum Ratings
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum
ratings are stress ratings only and functional device operation is not implied.
Parameter
Min.
Max.
Units
PVDD
Voltage on Any Other Pin
Average Switch Current (IAVG)
Junction Temperature
GND – 0.3
4.5
VIN + 0.3
2.0
150
V
V
A
°C
Storage Temperature Range
-65 150
°C
Lead Temperature (Soldering, 10 sec)
300 °C
Thermal Resistance (θJA)
Output Current, Source or Sink (peak)
30 °C/W
3.0 A
Operating Conditions
Parameter
Temperature Range
PVDD Operating Range
VCCQ Operating Range
Min.
0
2.0
1.4
Max.
70
4.0
4.0
Units
°C
V
V
Electrical Characteristics
Unless otherwise specified, AVCC = VDD = PVDD = 3.3V ±10%, TA = Operating Temperature Range (Note 1)
Symbol
Parameter
Conditions
Min. Typ. Max. Units
Switching Regulator
VTT Output Voltage, VTT
(See Figure 1)
VREFOUT Internal Resistor Divider
ZIN VREF Reference Pin Input
Impedance
IOUT = 0,
VREF = open
Note 2
IOUT = ±2A,
VREF = open
Note 2
IOUT = 0
Note 2
Note 2
VCCQ = 2.3V 1.12
VCCQ = 2.5V 1.22
VCCQ = 2.7V 1.32
VCCQ = 2.3V 1.09
VCCQ = 2.5V 1.19
VCCQ = 2.7V 1.28
VCCQ = 2.3V 1.139
VCCQ = 2.5V 1.238
VCCQ = 2.7V 1.337
VCCQ = 0
1.15
1.25
1.35
1.15
1.25
1.35
1.15
1.25
1.35
100
1.18
1.28
1.38
1.21
1.31
1.42
1.162
1.263
1.364
V
V
V
V
V
V
V
V
V
kΩ
Switching Frequency
650 kHz
∆VOFFSET Offset Voltage VTT – VREFOUT VCCA = 2.5V No Load VCCQ = 2.5
Supply
–20
20 mV
IQ Quiescent Current
Buffer
IOUT = 0, no load
VCCQ = 2.5V
IVCCQ
IAVCC
IAVCC SD
IVDD
IVDD SD
IPVDD
6 10 µA
0.5 1.0 mA
0.2 0.5 mA
0.25 1.0 mA
0.2 1.0 mA
100 250 µA
IREF Output Load Current
3 mA
Notes
1. Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
2. AVCC, PVDD = 3.3V ±10%
REV. 1.0.2 3/11/02
3
3Pages FAN6550
PRODUCT SPECIFICATION
SO DIMM
AND MODULES
TERMINATION
RESISTORS
SGRAM
3D
GRAPHIC CHIP
DATA LINE, CLOCK LINES,
ADDRESS LINES, CONTROL LINES
TERMINATION
RESISTORS
VOLTAGE
REGULATOR
2.5V
5V OR 3.3V
AGP/PCI BUS
VREF
VTT
FAN6550
Figure 3. Complete Termination Solution Graphics Memory Bus – AGP Graphics Cards
6 REV. 1.0.2 3/11/02
6 Page | |||
ページ | 合計 : 12 ページ | ||
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PDF ダウンロード | [ FAN6550 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
FAN6550 | 2A DDR Bus Termination Regulator | Fairchild Semiconductor |
FAN6555 | 2A DDR Bus Termination Regulator | Fairchild Semiconductor |