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FDC6302P の電気的特性と機能

FDC6302PのメーカーはFairchild Semiconductorです、この部品の機能は「Digital FET/ Dual P-Channel」です。


製品の詳細 ( Datasheet PDF )

部品番号 FDC6302P
部品説明 Digital FET/ Dual P-Channel
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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FDC6302P Datasheet, FDC6302P PDF,ピン配置, 機能
October 1997
FDC6302P
Digital FET, Dual P-Channel
General Description
These Dual P-Channel logic level enhancement mode field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This device
has been designed especially for low voltage applications as a
replacement for digital transistors in load switchimg applications.
Since bias resistors are not required this one P-Channel FET
can replace several digital transistors with different bias resistors
like the IMBxA series.
Features
-25 V, -0.12 A continuous, -0.5 A Peak.
RDS(ON) = 13 @ VGS= -2.7 V
RDS(ON) = 10 @ VGS = -4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.5V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple PNP digital transistors (IMHxA series) with
one DMOS FET.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current
- Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
TJ,TSTG
ESD
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Fairchild Semiconductor Corporation
4
5
6
FDC6302P
-25
-8
-0.12
-0.5
0.9
0.7
-55 to 150
6.0
140
60
3
2
1
Units
V
V
A
W
°C
kV
°C/W
°C/W
FDC6302P Rev.C

1 Page





FDC6302P pdf, ピン配列
Typical Electrical Characteristics
0.2
VGS = -5.0V
-4.0
-4.5 -3.5
-3.0
0.15
-2.7
0.1 -2.5
0.05 -2.0
0
0123
-VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
4
1.6
ID = -0.05A
1.4 V GS = -2.7V
1.2
1
0.8
0.6
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 3. On-Resistance Variation
with Temperature.
-1
-0.75
VDS = -5V
-0.5
T = -55°C
J
25°C
125°C
-0.25
0
-0.5
-1 -1.5 -2 -2.5
V GS , GATE TO SOURCE VOLTAGE (V)
-3
Figure 5. Transfer Characteristics.
2
V GS = -2.0 V
1.5
1
-2.5
-2.7
-3.0
-4.0
-3.5
-4.5
0.5
0
0.05 0.1 0.15
-I D , DRAIN CURRENT (A)
0.2
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
25
TA= 25°C
20
15
125 °C
ID = -0.05A
10
5
0
012345678
-V GS ,GATE TO SOURCE VOLTAGE (V)
Figure 4. On Resistance Variation with
Gate-To- Source Voltage.
0.5
VGS = 0V
0.1
0.01
TJ = 125°C
25°C
-55°C
0.0001
0
0.2 0.4 0.6 0.8
1
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6302P Rev.C


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共有リンク

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部品番号部品説明メーカ
FDC6302P

Digital FET/ Dual P-Channel

Fairchild Semiconductor
Fairchild Semiconductor


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