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FIN1018M の電気的特性と機能

FIN1018MのメーカーはFairchild Semiconductorです、この部品の機能は「3.3V LVDS 1-Bit High Speed Differential Receiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 FIN1018M
部品説明 3.3V LVDS 1-Bit High Speed Differential Receiver
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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FIN1018M Datasheet, FIN1018M PDF,ピン配置, 機能
March 2001
Revised April 2002
FIN1018
3.3V LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock or data.
The FIN1018 can be paired with its companion driver, the
FIN1017, or with any other LVDS driver.
Features
s Greater than 400Mbs data rate
s 3.3V power supply operation
s 0.4ns maximum pulse skew
s 2.5ns maximum propagation delay
s Low power dissipation
s Power-Off protection
s Fail safe protection for open-circuit, shorted and termi-
nated conditions
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Flow-through pinout simplifies PCB layout
s 8-Lead SOIC and US-8 packages save space
Ordering Code:
Order Number
FIN1018M
FIN1018MX
FIN1018K8X
Package Number
Package Description
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
MAB08A
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
Pin Descriptions
Pin Name
ROUT
RIN+
RIN
VCC
GND
NC
Description
LVTTL Data Output
Non-inverting Driver Input
Inverting Driver Input
Power Supply
Ground
No Connect
Connection Diagrams
8-Lead SOIC
Function Table
Input
RIN+
RIN
LH
HL
Fail Safe Condition
H = HIGH Logic Level
L = LOW Logic Level
Fail Safe = Open, Shorted, Terminated
Outputs
ROUT
L
H
H
Pin Assignment for US-8 Package
TOP VIEW
© 2002 Fairchild Semiconductor Corporation DS500502
www.fairchildsemi.com

1 Page





FIN1018M pdf, ピン配列
Note A: All input pulses have frequency = 10MHz, tR or tF = 1ns
Note B: CL includes all probe and fixture capacitances
FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
TABLE 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applied Voltages (V)
VIA
1.25
1.15
2.4
2.3
0.1
0
1.5
0.9
2.4
1.8
0.6
0
VIB
1.15
1.25
2.3
2.4
0
0.1
0.9
1.5
1.8
2.4
0
0.6
Resulting Differential
Input Voltage (mV)
VID
100
100
100
100
100
100
600
600
600
600
600
600
Resulting Common Mode
Input Voltage (V)
VIC
1.2
1.2
2.35
2.35
0.05
0.05
1.2
1.2
2.1
2.1
0.3
0.3
FIGURE 2. LVDS Input to LVTTL Output AC Waveforms
3 www.fairchildsemi.com


3Pages


FIN1018M 電子部品, 半導体
DC / AC Typical Performance Curves (Continued)
FIGURE 15. Transition Time vs.
Ambient Temperature
FIGURE 16. Differential Propagation Delay vs.
Load
FIGURE 17. Differential Propagation Delay vs.
Load
FIGURE 18. Transition Time vs.
Load
FIGURE 19. Transition Time vs.
Load
www.fairchildsemi.com
FIGURE 20. Power Supply Current vs.
Power Supply Voltage
6

6 Page



ページ 合計 : 8 ページ
 
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[ FIN1018M データシート.PDF ]


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共有リンク

Link :


部品番号部品説明メーカ
FIN1018

3.3V LVDS 1-Bit High Speed Differential Receiver

Fairchild Semiconductor
Fairchild Semiconductor
FIN1018K8X

3.3V LVDS 1-Bit High Speed Differential Receiver

Fairchild Semiconductor
Fairchild Semiconductor
FIN1018M

3.3V LVDS 1-Bit High Speed Differential Receiver

Fairchild Semiconductor
Fairchild Semiconductor
FIN1018MX

3.3V LVDS 1-Bit High Speed Differential Receiver

Fairchild Semiconductor
Fairchild Semiconductor


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