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3933 の電気的特性と機能

3933のメーカーはAllegro MicroSystemsです、この部品の機能は「THREE-PHASE POWER MOSFET CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 3933
部品説明 THREE-PHASE POWER MOSFET CONTROLLER
メーカ Allegro MicroSystems
ロゴ Allegro MicroSystems ロゴ 




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3933 Datasheet, 3933 PDF,ピン配置, 機能
3933
GHC 5
CC 6
GLB 7
SB 8
GHB 9
CB 10
GLA 11
SA 12
GHA 13
29 SENSE
28 RC
27 PWM
26 BRKSEL
25 BRKCAP
24 BRAKE
1293 DIR
22 H2
21 H3
Dwg. PP-068
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Supply Voltage, VBB ............................. 28 V
(peak) .............................................. 30 V
Terminal Voltage, VCCOUT ................. 13.2 V
(peak) .............................................. 15 V
Logic Input Voltage Range,
VIN .................. -0.3 V to VLCAP + 0.3 V
Sense Voltage Range,
VSENSE ............................. -5 V to VLCAP
Output Voltage Range,
VSA, VSB, VSC .................. -5 V to +30 V
VGHA, VGHB, VGHC . -5 V to VBB + 14 V
VCA, VCB, VCC ..................... VSX + 14 V
Operating Temperature Range,
TA ................................. -20°C to +85°C
Junction Temperature, TJ ................. +150°C
Storage Temperature Range,
TS ............................... -55°C to +150°C
THREE-PHASE POWER
MOSFET CONTROLLER
The A3933SEQ is a three-phase MOSFET controller for use with
bipolar brushless dc motors. It drives all n-channel external power
FETs, allowing system cost savings and minimizing r(DS)on power loss.
The high-side drive block is implemented with bootstrap capacitors at
each output to provide the floating positive supply for the gate drive.
The high-side circuitry also employs a unique “intelligent” FET
monitoring circuit that ensures the gate voltages are at the proper levels
before turn-on and during the ON cycle. This device is targeted for
applications with motor supplies from 12 V to 28 V.
Internal fixed off-time PWM current-control circuitry can be used to
regulate the maximum load current to a desired value. The peak load-
current limit is set by the user’s selection of an input reference voltage
and external sensing resistor. The fixed off-time pulse duration is set
by a user-selected external RC timing network.
A power-loss braking circuit brakes the motor on an under-voltage
condition. The device is configured to either coast or dynamically
brake the motor when this occurs.
The A3933SEQ is supplied in a 32-lead rectangular (9 x 7) plastic
chip carrier (quad pack) for minimum-area, surface-mount applica-
tions.
FEATURES AND BENEFITS
I Drives External N-Channel FETs
I Intelligent High-Side Gate Drive
I Selectable Coast or Dynamic Brake on Power Down
I Adjustable Dead Time for Cross-Conduction Protection
I Selectable Fast or Slow Current-Decay Modes
I Internal PWM Peak Current Control
I Reset/Coast Input
I 120° Hall Commutation with Internal Pullup
I Internal 5-V Regulator
I Low-Side Synchronous Rectification
I Direction Control
I PWM Speed-Control Input
I Fault-Diagnostic Output
I Under-Voltage Protection

1 Page





3933 pdf, ピン配列
3933
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL SPECIFICATIONS at TA = 25°C, VBB = VCCOUT = 12 V, Cload = 1000 pF, Cboot = 0.047 µF
(unless noted otherwise).
Parameter
Supply Current
Quiescent Current
Reference Voltage
Ref. Volt. Load Regulation
Output Voltage
Output Voltage Regulation
Digital Logic Levels
Logic Input Voltage
Logic Input Current
Gate Drive
Low-Side Output Voltage
High-Side Output Voltage
Low-Side Output
Switching Time
High-Side Output
Switching Time
DEAD Time
(Source OFF to Sink ON)
Symbol Conditions
IBB RESET low, fPWM = 40 kHz
RESET high
VLCAP
VLCAP(ILCAP) ILCAP = 0 to -2 mA
VCCOUT
VBB = 28 V
VCCOUT(ICCOUT) VBB = 28 V, ICCOUT = 0 to -10 mA
VIH
VIL
IIH VIH = 2 V
IIL VIL = 0.8 V
VGLxH
VGLxL
VGHxH
VGHxL
trGLx
tfGLx
trGHx
tfGHx
tDEAD
IGLx = 1 mA
IGHx = 1 mA
1 V to 8 V
8 V to 1 V
1 V to 8 V
8 V to 1 V
IDEAD = 10 µA
IDEAD = 215 µA
Min
4.75
10.8
2.0
-70
9.5
9.0
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
Limits
Typ Max Units
16 19
15 17
5.0 5.25
10 25
12 13.2
– 25
mA
mA
V
mV
V
mV
––
– 0.8
<1.0 10
– -130
V
V
µA
µA
10.5
10.5
50
40
100
100
3000
180
11.5 V
0.30 V
11.5 V
0.25 V
– ns
– ns
– ns
– ns
– ns
– ns
Continued —
www.allegromicro.com


3Pages


3933 電子部品, 半導体
3933
THREE-PHASE POWER
MOSFET CONTROLLER
Terminal Descriptions (cont’d)
FAULT — Open-drain output to indicate fault condition; will
go active high for any of the following:
1 – invalid HALL input code,
2 – high-side, gate-source voltage less than 7 V,
3 – bootstrap capacitor not sufficiently charged, or
4 – under-voltage condition detected at VCCOUT.
The fault state for gate-source and bootstrap monitors are
cleared at each commutation. If the motor has stalled, then the
fault can only be cleared by toggling the RESET terminal or
power-up sequence.
MODE — A logic input to set current-decay method, internally
pulled up to VLCAP (+5 V). When in slow-decay mode (logic
HIGH), only the high-side FET is switched open during a PWM
OFF cycle. The fast-decay mode (logic LOW) switches both
the source and sink FETs.
H1/H2/H3 — Hall-sensor inputs; internally pulled up to VLCAP
(+5 V). Configured for 120° electrical spacing.
DIR — A logic input to reverse rotation, see commutation logic
table. Internally pulled up to VLCAP (+5 V).
BRAKE — A logic input to short out the motor windings for a
braking function. A logic HIGH will turn ON the low-side
FETs, turn OFF the high-side FETs. Internally pulled up to
VLCAP (+5 V). The braking torque applied will depend on the
speed.
BRKCAP — Connection for reservoir capacitor. This terminal
is used to provide a positive power supply for the sink-drive
outputs for a power-down condition. This will allow predict-
able braking, if desired. A blocking diode to VCCOUT is re-
quired. A 4.7 µF capacitor will provide 6.5 V gate drive for
300 ms. If a power-down braking option is not needed
(BRKSEL = LOW) then this terminal should be tied to VCCOUT.
BRKSEL — A logic input to enable/disable braking on power-
down condition. Internally pulled up to VLCAP (+5 V). If held
low, the motor will coast on a power-down condition.
PWM — Speed control input, internally pulled up to VLCAP
(+5 V). A logic LOW turns OFF all drivers, a logic HIGH will
turn ON selected drivers as determined by H1/H2/H3 input
logic. Holding the terminal high allows speed/torque control
solely by the current-limit circuit via REF analog voltage
command.
RC — An analog input used to set the fixed off time with an
external resistor (RT) and capacitor (CT). The tblank time is
controlled by the value of the external capacitor (see Applica-
tions Information). As a rule, the fixed off time should not be
less than 10 µs. The resistor should be in the range of 10 kto
100 k.
SENSE — An analog input to the current-limit comparator.
A voltage representing load current appears on this terminal
during ON time, when it reaches REF voltage, the comparator
trips and load current decays for the fixed off-time interval.
Voltage transients seen at this terminal when the drivers turn
ON are ignored for time tblank.
REF — An analog input to the current-limit comparator.
Voltage applied here sets the peak load current.
Ipeak = VREF/RS.
VCCOUT — A regulated 12 V output; supply for low-side gate
drive and bootstrap capacitor charge circuits. It is good practice
to connect a decoupling capacitor from this terminal to AGND,
as close to the device terminals as possible. The terminal
should be shorted to VBB for 12 V applications.
VBB — The A3933 supply voltage. It is good practice to
connect a decoupling capacitor from this terminal to AGND, as
close to the device terminals as possible. This terminal should
be shorted to VCCOUT for 12 V applications.
LCAP — Connection for decoupling capacitor for the internal
5 V reference. This terminal can source no more than 2 mA.
DEAD — An analog input. A resistor between DEAD and
LCAP is selected to adjust turn-off to turn-on time. This delay
is needed to prevent shoot-through in the external power FETs.
The allowable resistor range is 20 kto 430 k, which
converts to deadtime of 210 ns to 2.1 µs, using the following
equation:
tDEAD = (6.75 x 10-12 x RDEAD) + (75 x 10-9).
AGND — The low-level (analog) reference point for the
A3933.
PGND — The reference point for all low-side gate drivers.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
3932

THREE PHASE POWER MOSFET CONTROLLER

Allegro MicroSystems
Allegro MicroSystems
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THREE-PHASE POWER MOSFET CONTROLLER

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3-PHASE POWER MOSFET CONTROLLER

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