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PDF 2SK3440 Data sheet ( Hoja de datos )
| Número de pieza | 2SK3440 | |
| Descripción | Switching Regulator/ DC-DC Converter Applications Motor Drive Applications | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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2SK3440
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSII)
2SK3440
Switching Regulator, DC-DC Converter Applications
Motor Drive Applications
Unit: mm
• Low drain-source ON resistance: RDS (ON) = 6.5 mΩ (typ.)
• High forward transfer admittance: |Yfs| = 30 S (typ.)
• Low leakage current: IDSS = 100 µA (VDS = 60 V)
• Enhancement-mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 1 mA)
Maximum Ratings (Tc = 25°C)
Characteristics
Symbol
Drain-source voltage
Drain-gate voltage (RGS = 20 kΩ)
Gate-source voltage
Drain current
DC (Note 1)
Pulse (Note 1)
Drain power dissipation
Single pulse avalanche energy (Note 2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
VDSS
VDGR
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
60
60
±30
50
200
125
644
50
12.5
150
−55 to 150
Unit
V
V
V
A
W
mJ
A
mJ
°C
°C
JEDEC
―
JEITA
SC-97
TOSHIBA
2-9F1B
Weight: 0.74 g (typ.)
Thermal Characteristics
Characteristics
Symbol Max Unit
Notice:
Thermal resistance, channel to case
Rth (ch-c)
1.00
°C/W
Please use the S1 pin for gate input
signal return. Make sure that the
Note 1: Please use devices on condition that the channel temperature
main current flows into S2 pin.
is below 150°C.
Note 2: VDD = 50 V, Tch = 25°C (initial), L = 350 µH, RG = 25 Ω, IAR = 50 A
4
Note 3: Repetitive rating; pulse width limited by maximum channel temperature.
This transistor is an electrostatic sensitive device. Please handle with caution.
1
2
3
1 2002-03-04
1 page  
2SK3440
rth – tw
10
1
Duty = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.00001
0.0001
0.001
0.01
Pulse width tw (s)
PDM
t
T
Duty = t/T
Rth (ch-c) = 1.0°C/W
0.1 1
10
Safe operating area
500
300 ID max (pulsed) *
100
ID max (continuous)
50
30
100 µs *
1 ms *
10 DC operation
5
*: Single nonrepetitive pulse
3 Tc = 25°C
Curves must be derated
linearly with increase in
temperature
1
13
10
30
Drain-source voltage VDS (V)
100
EAS – Tch
1000
800
600
400
200
0
25 50
75 100 125 150
Channel temperature (initial) Tch (°C)
15 V
0V
BVDSS
IAR
VDD
VDS
Test circuit
RG = 25 Ω
VDD = 50 V, L = 350 µH
Waveform
ΕAS
=
1
2
⋅L ⋅I2
⋅
BVDSS
BVDSS − VDD
5 2002-03-04
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 2SK3440.PDF ] | |
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