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PDF CXD9450-23 Data sheet ( Hoja de datos )
| Número de pieza | CXD9450-23 | |
| Descripción | Single-Chip FaxEngine Product Family | |
| Fabricantes | ETC | |
| Logotipo |  |
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Single-Chip FaxEngine Product Family
Single-Chip FaxEngine (CXD9450)
and Integrated Analog Device (CX20415)
The Conexant™ Single-Chip FaxEngine product family consists of the Single-Chip
FaxEngine (CXD9450) that contains an embedded modem Digital Signal Processor
(DSP), and a separate Integrated Analog (IA) device (20415).
This device set, along with the supporting firmware and evaluation system,
comprises a complete facsimile machine—needing only power supply, scanner, and
printer mechanism components to complete the machine. A system-level block
diagram is shown in Figure 1.
Integrated Controller
The integrated controller (SCC) provides the majority of the electronics necessary to
build a thermal or thermal transfer facsimile machine integrated into a one-chip
solution. The controller performs primary facsimile control/monitoring and
compression/decompression functions, and interfaces with fax machine
components such as a scanner, printer, motor, and operator control panel. The
MC24 embedded processor provides an external 16-MB direct memory access
capability. An integrated Pipeline ADC, combined with Conexant's Image
Processing Scheme, provides state of the art image processing performance on text
and gray scale images.
Embedded Modem DSP
The embedded modem DSP supports V.29 and V.27 ter facsimile transmission and
reception, in addition to all basic HDLC functions and T.30 requirements. The
modem allows all line connections and single or dual tone generation and detection.
Optional features such as V.17, voice compression/decompression for Digital
Telephone Answering Machine (DTAM), and duplex speakerphone are also
available.
Figure 1. Single-Chip FaxEngine System Level Block Diagram
Local
Handset
Telephone
Line
DAA
Line IA
Speaker
Phone
Secondary
Line IA
Operator
Panel
Single-Chip FaxEngine (CXD9450)
DSP
SCC
CCD or CIS
Scanner
Thermal Printer or
Thermal Transfer
Plain Paper
Inkjet Printer
(Optional)
NOR
FLASH
2 MB
DRAM
8 MB
Control Bus
Data Bus
Address Bus
8
24
20
11
SRAM
1 MB
8
20
24
ROM
2 MB
20
Features
Microprocessor and
Bus Interface
• MC24 Central Processing Unit
− Up to 10 MHz CPU clock speed
− Memory efficient input/output bit
manipulation
− 24-bit internal address bus,
8-bit data bus
• External Bus
− Address, data, control, status,
and decoded chip select signals
support connection to external
ROM, SRAM, DRAM and
operator panel
− 24-bit external address bus
− 8-bit data bus
• Chip selects
− ROMCSn for ROM support
− CS0n for SRAM
− CS1n-CS5n for external I/O
− FCSn for FLASH memory
support
− LCDCS for LCD support
• DRAM Controller
− DRAM is refreshed in Sleep and
Stand-by modes
− Up to 8 MB supported in two
blocks
− Organizations supported:
4 or 8-bit
− Single and page mode access
support
• Flash memory support
− NAND and NOR-type support
− Serial NAND support
− NOR-type memory up to 2 MB
• DMA Controller
− Six dedicated internal DMA
channels for scanner, thermal
printer, and T.4/T.6 access of
internal and/or external
memory.
− DMA Channel 2 can be
reprogrammed for external
access to plain paper inkjet
printing
Data Sheet
Conexant
Doc. No. 100544C
September 8, 2000
1 page  
Single-Chip FaxEngine and Integrated Analog Device
Single-Chip FaxEngine Product Family
Flash Memory Controller
Scanner and Video Control
The CXD9450 includes a flash memory controller that
supports NOR, NAND, and Serial NAND-type flash
memory. The supported size of NOR-type memory is up
to 2 MB and the supported size of NAND-type memory is
unlimited.
Stepper Motor Control
Eight outputs are provided to external current drivers:
four to the scanner motor and four to the printer motor.
The stepping patterns are programmable and selectable
line times are supported. A timeout circuit controls the
power control of the motors. The printer or scanner
motor outputs can be programmed as GPOs for
applications using single motor or plain paper printers
T.4/T.6 Compressor/Decompressor
MH, MR, and MMR compression and decompression are
provided in hardware. T.4 line lengths of up to 2616
pixels are supported. MMR and Alternating
Compression/Decompression (ACD) on a line by line
basis provide support for up to three independent
compression and decompression processes.
Bi-level Resolution Conversion
Six programmable control and timing signals support
common CCD and CIS scanners. The video control
function provides signals for controlling the scanner and
for processing its video output. Four programmable
control signals (START, CLK1, CLK1n, and CLK2)
provide timing related to line and pixel timing. These are
programmable with regard to start time, relative delay
and pulse width.
Two video control output signals (VIDCTL[1:0]) provide
digital control for external signal pre-processing circuitry.
These signals provide a per pixel period, or per line
period, timing with programmable polarity control for
each signal.
Scanner Pipeline A/D Interface
An internal 8-bit Pipeline A/D converter (PADC) is
provided. The A/D reference input (+Vref) is externally
fixed to VDD. Internal +Vref is available for control by the
CPU. The internal +Vref covers the range from +2.25 V
to +2.7 V. Scanner input signal supported with full scale
is from 0.65 V P-P to 2.7 V P-P. Clamping, AGC, and
Sample/Hold circuits are built-in. The PADC data output
includes an overflow bit. The AGC gain is programmable
from 0 to 12 dB, in 1-dB steps.
One independent programmable bi-level 1D-resolution
conversion block is provided to perform expansion or
reduction on the T.4 decompressed data and scan image
data. Image expansion can be programmed up to 200%
and reduction down to 60%. Vertical line ORing and data
output bit order reversal is also provided.
Printer IF
The Printer Interface provides a standard connection
between the CXD9450 and a thermal printhead to support
thermal printing or thermal transfer. The thermal printer
interface consists of programmable data, latch, clock,
and up to four strobe signals. Programmable timing
supports traditional thermal printers, as well as the
latchless split mode printers, and line lengths of up to
2048 pixels. Line times from 5 ms to 40 ms are
supported.
The CXD9450 includes a thermal ADC (TADC) function
utilizing a D/A converter and a comparator to monitor the
printhead temperature. External terminating resistors
must be supplied; the values are determined by the
specific printhead selected.
Video Processing
The CXD9450 supports two modes of shading correction
for scanner data non-uniformity arising from uneven
sensor output or uneven illumination. Correction is
provided on either an 8-pixel group or is applied
separately to each pixel. Dark level correction and
gamma correction are also provided.
Two-dimensional Error Diffusion/Dithering is performed
on halftone images.
The CXD9450 includes an 8 x 8 dither table, which is
programmable and stored internally (8-bits per table
entry). The table is arranged in a matrix of 8 rows by 8
columns. The video processing circuit provides mixed-
mode detection/processing and multi-level Resolution
Conversion for the scanner multi-level data. The
conversion ratio of the multi-level Resolution Conversion
is fixed to B4-A4 conversion.
As an option, plain paper inkjet printing can be
supported.
100544C
Conexant
5
5 Page 
Single-Chip FaxEngine and Integrated Analog Device
Single-Chip FaxEngine Product Family
Table 1. CXD9450 176-Pin TQFP Assignments (Cont'd)
Pin Signal Label
I/O
89 IVREFn
O
90 IVREFp
O
91 VDD
—
92 THADI
I
93 OPO[7]/GPO[15]
O
94 OPO[6]/GPO[14]
O
95 OPO[5]/GPO[13]
O
96 OPO[4]/GPO[12]/SSTXD1
O
97 OPO[3]/GPO[11]
O
98 OPO[2]/GPO[10]/RINGER
OZ
99 OPO[1]/GPO[9]/PMPWRCTRL O
100 OPO[0]/GPO[8]/SMPWRCTRL O
101 OPI[3]/GPIO[24]
I/O
102 OPI[2]/GPIO[23]/SSCLK1
I/O
103 OPI[1]/GPIO[22]/SSSTAT1 I/O
104 OPI[0]/GPIO[21]/SSRXD1
I/O
105 RESETn
I/O
106 VSS
—
107 GPIO[18]/IRQ[9]n
I/O
108 GPIO[3]/SASCLK
I/O
109 GPIO[2]/SASRXD
I/O
110 GPIO[1]/SASTXD
I/O
111 GPIO[9]/FRDn
I/O
112 GPIO[8]/FWRn
I/O
113 FCSn[2]/VIDCTL[1]/GPO[22] O
114 FCSn[1]/VIDCTL[0]/GPO[23] O
115 CLK2/GPO[24]
O
116 CLK1n/GPO[25]
O
117 CLK1
O
118 START
O
119 VDD
—
120 TONE
O
121 VSS
—
122 GPIO[25]
I/O
123 GPIO[26]
I/O
124 GPIO[27]
I/O
125 GPIO[28]
I/O
126 GPO[26]
O
127 GPO[27]
O
128 GPO[28]
O
129 GPO[29]
O
130 GPO[30]
O
131 GPIO[29]
I/O
132 GPIO[30]
I/O
Input
Type
VR-
VR+
—
Analog
—
—
—
—
—
—
—
—
Hu
Hu
Hu
Hu
Hu
—
Hu
Hu
Hu
Hu
Hu
Hu
—
—
—
—
—
—
—
—
—
Hu
Hu
Hu
Hu
—
—
—
—
—
Hu
Hu
Output
Type
—
—
—
—
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
2XC
—
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
2XC
2XC
—
Analog
—
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
13Xs
Pin Description
PADC
PADC
VDDi
TADC
—
—
—
—
—
—
—
—
—
—
—
—
—
VSSo
—
—
—
—
—
—
—
—
—
—
—
—
VDDo
—
VSSi
—
—
—
—
—
—
—
—
—
—
—
100544C
Conexant
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CXD9450-23.PDF ] | |
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