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PDF CXD2428Q Data sheet ( Hoja de datos )
| Número de pieza | CXD2428Q | |
| Descripción | Video Scan Converter | |
| Fabricantes | Sony Corporation | |
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Video Scan Converter
CXD2428Q
Description
The CXD2428Q is an IC which generates control
signals and performs line interpolation calculations
for field memory (CXK1206AM/ATM) in order to
perform video signal scanning line conversion. In
addition, this IC performs the aspect conversion of
the ZOOM mode and WIDE-ZOOM mode in order to
support wide screens.
100 pin QFP (Plastic)
Features
• Video signal (NTSC/PAL) scanning line conversion function
• ZOOM function
(Function to cut top and bottom areas of 4:3 image and expand it to 16:9)
• WIDE-ZOOM function
(Function to vertically compress 4:3 image and expand it to 16:9)
• Operating frequency: 28.6MHz (typ.)
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
VDD VSS – 0.5 to +7.0
• Input voltage
VI VSS – 0.5 to VDD +0.5
• Output voltage
VO VSS – 0.5 to VDD +0.5
• Operating temperature Topr
–20 to +75
• Storage temperature
Tstg
–55 to +150
V
V
V
°C
°C
Operating Conditions
Supply voltage
VDD
4.5 to 5.5
V
Applications
Liquid crystal projectors, etc.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95442-ST
1 page  
Pin
No.
Symbol
75 YSD4
76 YSD5
77 YSD6
78 VDD3
79 VSS6
80 YSD7
81 YFD0
82 YFD1
83 YFD2
84 YFD3
85 YFD4
86 YFD5
87 YFD6
88 YFD7
89 HCR0
90 VSS7
91 VCR0
92 WEN0
93 ADCK
94 ODEV
95 HRET
96 HIN
97 VIN
98 CKI
99 RYOE
100 BYOE
I/O
I Y lower line data input
I Y lower line data input
I Y lower line data input
— Power supply
— GND
I Y lower line data input (MSB)
I Y upper line data input (LSB)
I Y upper line data input
I Y upper line data input
I Y upper line data input
I Y upper line data input
I Y upper line data input
I Y upper line data input
I Y upper line data input (MSB)
O Write memory horizontal clear
— GND
O Write memory vertical clear
O Write memory enable
O AD converter clock
I Field information input
O Phase comparison output
I Horizontal sync signal input
I Vertical sync signal input
I Write clock input
O AD converter (R-Y) enable
O AD converter (B-Y) enable
Description
CXD2428Q
–5–
5 Page 
CXD2428Q
Mode Setting and Operation
1. Horizontal Write
CKI is input after phase comparison with HSYNC input.
PLL frequency division value is set by H SZ WR (standard 38C (hexadecimal)), and HRET is output.
Write start timing is set by H SHIFT.
An ADCK pulse, which is CKI halved, is output.
The enable pulses RYOE and BYOE for R-Y and B-Y A/D converter are output.
HIN
HRET
HWEN
(Internal pulse)
HCR0
RYOE
BYOE
H SZ WR + 2ck
(H SHIFT + 1) × 2ck
CKI
ADCK
RYOE
BYOE
– 11 –
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CXD2428Q.PDF ] | |
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