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PDF CY7C265-25PC Data sheet ( Hoja de datos )
| Número de pieza | CY7C265-25PC | |
| Descripción | 8K x 8 Registered PROM | |
| Fabricantes | Cypress Semiconductor | |
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65
CY7C265
Features
• CMOS for optimum speed/power
• High speed (Commercial)
— 15 ns address set-up
— 12 ns clock to output
• Low power
— 660 mW (Commercial)
• On-chip edge-triggered registers
— Ideal for pipelined microprogrammed systems
• EPROM technology
— 100% programmable
— Reprogrammable (CY7C265W)
• 5V ±10% VCC, commercial and military
• Capable of withstanding >2001V static discharge
• Slim 28-pin, 300-mil plastic or hermetic DIP
Functional Description
The CY7C265 is a 8192 x 8 registered PROM. It is organized
as 8,192 words by 8 bits wide, and has a pipeline output
register. In addition, the device features a programmable
initialize byte that may be loaded into the pipeline register with
the initialize signal. The programmable initialize byte is the
8,193rd byte in the PROM and its value is programmed at the
time of use.
Packaged in 28 pins, the PROM has 13 address signals (A0
through A12), 8 data out signals (O0 through O7), E/I (enable
or initialize), and CLOCK.
CLOCK functions as a pipeline clock, loading the contents of
the addressed memory location into the pipeline register on
each rising edge. The data will appear on the outputs if they
are enabled. One pin on the CY7C265 is programmed to
perform either the enable or the initialize function.
8K x 8 Registered PROM
If the asynchronous enable (E) is being used, the outputs may
be disabled at any time by switching the enable to a logic
HIGH, and may be returned to the active state by switching the
enable to a logic LOW.
If the synchronous enable (ES) is being used, the outputs will
go to the OFF or high-impedance state upon the next positive
clock edge after the synchronous enable input is switched to
a HIGH level. If the synchronous enable pin is switched to a
logic LOW, the subsequent positive clock edge will return the
output to the active state. Following a positive clock edge, the
address and synchronous enable inputs are free to change
since no change in the output will occur until the next
LOW-to-HIGH transition of the clock. This unique feature al-
lows the CY7C265 decoders and sense amplifiers to access
the next location while previously addressed data remains sta-
ble on the outputs.
If the E/I pin is used for INIT (asynchronous), then the outputs
are permanently enabled. The initialize function is useful
during power-up and time-out sequences, and can facilitate
implementation of other sophisticated functions such as a
built-in “jump start” address. When activated, the initialize
control input causes the contents of a user programmed
8193rd 8-bit word to be loaded into the on-chip register. Each
bit is programmable and the initialize function can be used to
load any desired combination of 1’s and 0’s into the register.
In the unprogrammed state, activating INIT will generate a
register clear (all outputs LOW). If all the bits of the initialize
word are programmed to be a 1, activating INIT performs a
register preset (all outputs HIGH).
Applying a LOW to the INIT input causes an immediate load
of the programmed initialize word into the pipeline register and
onto the outputs. The INIT LOW disables clock and must
return HIGH to enable clock independent of all other inputs,
including the clock.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-04012 Rev. *A
Revised October 9, 2002
1 page  
CY7C265
Switching Waveform
ADDRESS
SYNCHRONOUS
ENABLE
(PROGRAMMABLE)
CLOCK
tSES
tHES
tAS
tPWC
OUTPUT
tDI
ASYNCHRONOUS INIT
(PROGRAMMABLE)
ASYNCHRONOUS
ENABLE
VALID DATA
tPWI
tRI
tHZC
tAH
tCOS
tCO
tHZE
tDOE
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the 7C265 in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity • exposure time) of 25 Wsec/cm2. For an ultraviolet
lamp with a 12 mW/cm2 power rating the exposure time would
be approximately 45 minutes. The 7C265 needs to be within
one inch of the lamp during erasure. Permanent damage may
result if the PROM is exposed to high-intensity UV light for an
extended period of time. 7258 Wsec/cm2 is the recommended
maximum dosage.
Bit Map Data
Programmer Address (Hex.)
Decimal
Hex
0
.
.
8191
8192
8193
0
.
.
1FFF
2000
2001
RAM Data
Contents
Data
.
.
Data
INIT Byte
Control Byte
Control Byte
00 Asynchronous output enable (default condition)
01 Synchronous output enable
02 Asynchronous initialize
Programming Modes
The 7C265 offers a limited selection of programmed architec-
tures. Programming these features should be done with a
single 10-ms-wide pulse in place of the intelligent algorithm,
mainly because these features are verified operationally, not
with the VFY pin. Architecture programming is implemented by
applying the supervoltage to two additional pins during
programming. In programming the 7C265 architecture, VPP is
applied to pins 3, 9, and 22. The choice of a particular mode
depends on the states of the other pins during programming,
so it is important that the condition of the other pins be met as
set forth in the mode table. The considerations that apply with
respect to power-up and power-down during intelligent
programming also apply during architecture programming.
Once the supervoltages have been established and the
correct logic states exist on the other device pins,
programming may begin. Programming is accomplished by
pulling PGM from HIGH to LOW and then back to HIGH with
a pulse width equal to 10 ms.
Document #: 38-04012 Rev. *A
Page 5 of 11
5 Page 
Document History Page
Document Title: CY7C265 8K x 8 Registered PROM
Document Number: 38-04012
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
114139 03/18/02
DSG Change from Spec number: 38-00084 to 38-04012
*A
118896 10/09/02
GBI Update ordering information
CY7C265
Document #: 38-04012 Rev. *A
Page 11 of 11
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| PDF Descargar | [ Datasheet CY7C265-25PC.PDF ] | |
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