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AN77L07 の電気的特性と機能

AN77L07のメーカーはPanasonic Semiconductorです、この部品の機能は「3-pin Low Power Loss Voltage Regulato (100mA Type)」です。


製品の詳細 ( Datasheet PDF )

部品番号 AN77L07
部品説明 3-pin Low Power Loss Voltage Regulato (100mA Type)
メーカ Panasonic Semiconductor
ロゴ Panasonic Semiconductor ロゴ 




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AN77L07 Datasheet, AN77L07 PDF,ピン配置, 機能
Voltage Regulators
AN77L00/AN77L00M Series
3-pin Low Power Loss Voltage Regulato r(100mA Type)
s Overview
The AN77L00/AN77L00M series is a stabilized constant
voltage power supply with a low input/output voltage(0.3V
max.). It is suitable for the low-voltage equipment using
batteries, and consumer/industrial equipment with great
fluctuation of the supply voltage.
A wide range of output voltage is available from 3V
through 10V.
AN77L00 Series
5.0±0.2
Unit : mm
4.0±0.2
s Features
Minimum input/output voltage difference : 0.3V(max.)
Built-in overcurrent limiting circuit
Built-in rush current preventive circuit at saturation volt-
age rise time
Built-in overheat protective circuit
Built-in input short-circuit protective circuit
+0.2
0.45 – 0.1
2.54
2.3±0.2
2 31
3-pin SIL Plastic Package (TO-92) (SSIP003-P-0000)
AN77L00M Series
Unit : mm
4.6max.
1.8max.
1.6max.
4.5
0.48max.
0.58max.
1.5
3.0
0.44max.
123
3-pin SIL Mini Power Type Plastic Package (TO-220F) (SSIP003-P-0000D)
1

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AN77L07 pdf, ピン配列
Voltage Regulators
AN77L00/AN77L00M Series
s Electrical Characteristics (Ta=25˚C)
AN77L03/M (3V, 100mA Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Input stability
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
Output voltage temperature coefficient
VO
REGIN
REGL
Ibias
Ibias
Irush
RR
VDIF (min) 1
VDIF (min) 2
Vno
VO/Ta
Tj=25˚C
VI=3.62 to 13.62V, Tj=25˚C
IO=0 to 100mA, Tj=25˚C
IO=0mA, Tj=25˚C
IO=0 to 100mA, Tj=25˚C
VI=2.7V, IO=0mA, Tj=25˚C
VI=3.62 to 5.62V, f=120Hz
VI=2.7V, IO=50mA, Tj=25˚C
VI=2.7V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Tj= –30 to+125˚C
2.88
3 3.12
V
2 60 mV
8 60 mV
0.9 1.5 mA
3 5 mA
1.5 5 mA
60 70
dB
0.12 0.25
V
0.22 0.3
V
70 µV
0.2 mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4V, IO=50mA, CO=10µF unless otherwise specified.
AN77L035/M (3.5V, 100mA Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Input stability
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
Output voltage temperature coefficient
VO
REGIN
REGL
Ibias
Ibias
Irush
RR
VDIF (min) 1
VDIF (min) 2
Vno
VO/Ta
Tj=25˚C
VI= 4.14 to 14.14V, Tj=25˚C
IO= 0 to 100mA, Tj= 25˚C
IO= 0mA, Tj= 25˚C
IO= 0 to 100mA, Tj= 25˚C
VI= 3.15V, IO= 0mA, Tj=25˚C
VI= 4.14 to 6.14V, f=120Hz
VI= 3.15V, IO= 50mA, Tj= 25˚C
VI= 3.15V, IO=100mA, Tj= 25˚C
f=10Hz to 100kHz
Tj= –30 to+125˚C
3.36 3.5 3.64
V
3 60 mV
9 60 mV
0.9 1.5 mA
3 5 mA
1.5 5 mA
59 69
dB
0.12 0.25
V
0.22 0.41
V
75 µV
0.23 mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4.5V, IO=50mA, CO=10µF unless otherwise specified.
AN77L04/M (4V, 100mA Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Input stability
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
Output voltage temperature coefficient
VO
REGIN
REGL
Ibias
Ibias
Irush
RR
VDIF (min) 1
VDIF (min) 2
Vno
VO/Ta
Tj=25˚C
VI= 4.66 to 14.66V, Tj= 25˚C
IO= 0 to 100mA, Tj= 25˚C
IO= 0mA, Tj= 25˚C
IO= 0 to 100mA, Tj=25˚C
VI=3.6V, IO= 0mA, Tj= 25˚C
VI= 4.66 to 6.66V, f=120Hz
VI=3.6V, IO=50mA, Tj= 25˚C
VI=3.6V, IO=100mA, Tj= 25˚C
f=10Hz to 100kHz
Tj= –30 to+125˚C
3.84
4 4.16
V
3 60 mV
9 60 mV
0.9 1.5 mA
3 5 mA
1.5 5 mA
59 69
dB
0.12 0.25
V
0.23 0.3
V
80 µV
0.26 mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=5V, IO=50mA, CO=10µF unless otherwise specified.
3


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AN77L07 電子部品, 半導体
AN77L00/AN77L00M Series
Voltage Regulators
s Electrical Characteristics (Ta=25˚C)
AN77L10/M (10V, 100mA Type)
Parameter
Output voltage
Input stability
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
Output voltage temperature coefficient
Symbol
VO
REGIN
REGL
Ibias
Ibias
Irush
RR
VDIF (min) 1
VDIF (min) 2
Vno
VO/Ta
Condition
Tj=25˚C
VI=10.9 to 20.9V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
VI= 9.0V, IO=0mA, Tj=25˚C
VI=10.9 to 12.9V, f=120Hz
VI= 9.0V, IO=50mA, Tj=25˚C
VI= 9.0V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Tj= –30 to+125˚C
min
9.6
50
typ max Unit
10 10.4
V
7 100 mV
14 100 mV
1.2 1.7 mA
3 5 mA
1.5 5 mA
60 dB
0.13 0.25
V
0.29 0.55
V
165 µV
0.67 mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=11V, IO=50mA, CO=10µF unless otherwise specified.
AN77L12/M (12V, 100mA Type)
Parameter
Output voltage
Input stability
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
Output voltage temperature coefficient
Symbol
VO
REGIN
REGL
Ibias
Ibias
Irush
RR
VDIF (min) 1
VDIF (min) 2
Vno
VO/Ta
Condition
Tj=25˚C
VI=12.98 to 22.98V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
VI=10.8V, IO=0mA, Tj=25˚C
VI=12.98 to 14.98V, f=120Hz
VI=10.8V, IO=50mA, Tj=25˚C
VI=10.8V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Tj=–30 to+125˚C
min
11.52
48
typ max Unit
12 12.48
V
8 120 mV
15 120 mV
1.4 1.9 mA
3 5 mA
1.5 5 mA
58 dB
0.13 0.25
V
0.31 0.6
V
190 µV
0.8 mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms)and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=13V, IO=50mA, CO=10µF unless otherwise specified.
s Application Circuit
VI
0.33µF
AN77L00/M
series
VO
+
10µF
• For the AN77L00/M series, the gain inside the IC is set high to improve the performance. For the reason, use
the capacitor of 10µF or more when the power line in the output side should be long.
In addition, install the capacitor in the output side as near as possible to the IC.
6

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部品番号部品説明メーカ
AN77L00

3-pin Low Power Loss Voltage Regulato (100mA Type)

Panasonic Semiconductor
Panasonic Semiconductor
AN77L00M

3-pin Low Power Loss Voltage Regulato (100mA Type)

Panasonic Semiconductor
Panasonic Semiconductor
AN77L03

3-pin Low Power Loss Voltage Regulato (100mA Type)

Panasonic Semiconductor
Panasonic Semiconductor
AN77L035

3-pin Low Power Loss Voltage Regulato (100mA Type)

Panasonic Semiconductor
Panasonic Semiconductor


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