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HM624100HJP-15 の電気的特性と機能

HM624100HJP-15のメーカーはHitachi Semiconductorです、この部品の機能は「4M High Speed SRAM (1-Mword x 4-bit)」です。


製品の詳細 ( Datasheet PDF )

部品番号 HM624100HJP-15
部品説明 4M High Speed SRAM (1-Mword x 4-bit)
メーカ Hitachi Semiconductor
ロゴ Hitachi Semiconductor ロゴ 




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HM624100HJP-15 Datasheet, HM624100HJP-15 PDF,ピン配置, 機能
HM624100H Series
4M High Speed SRAM (1-Mword × 4-bit)
ADE-203-789D (Z)
Rev. 1.0
Sep. 15, 1998
Description
The HM624100H is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed
access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit
designing technology. It is most appropriate for the application which requires high speed and high density
memory, such as cache and buffer memory in system. The HM624100H is packaged in 400-mil 32-pin SOJ
for high density surface mounting.
Features
Single 5.0 V supply : 5.0 V ± 10 %
Access time 10/12/15 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current : 200/180/160 mA (max)
TTL standby current : 70/60/50 mA (max)
CMOS standby ccurrent : 5 mA (max)
: 1.2 mA (max) (L-version)
Data retension current : 0.8 mA (max) (L-version)
Data retension voltage : 2.0 V (min) (L-version)
Center VCC and VSS type pinout

1 Page





HM624100HJP-15 pdf, ピン配列
Pin Description
Pin name
A0 to A19
I/O1 to I/O4
CS
OE
WE
VCC
VSS
NC
Function
Address input
Data input/output
Chip select
Output enable
Write enable
Power supply
Ground
No connection
HM624100H Series
Block Diagram
(LSB)
A1
A17
A7
A11
A16
A2
A6
A5
(MSB)
I/O1
.
.
.
I/O4
WE
CS
Row
decoder
Memory matrix
256 rows × 16 columns ×
256 blocks × 4 bit
(4,194,304 bits)
Internal
voltage
generater
VCC
VSS
CS
Input
data
control
Column I/O
Column decoder
CS
A10 A8 A9 A19 A12 A13 A14 A0 A18 A15 A3 A4
(LSB)
(MSB)
OE
CS
3


3Pages


HM624100HJP-15 電子部品, 半導体
HM624100H Series
AC Characteristics (Ta = 0 to +70°C, VCC = 5.0 V ± 10 %, unless otherwise noted.)
Test Conditions
Input pulse levels: 3.0 V/0.0 V
Input rise and fall time: 3 ns
Input and output timing reference levels: 1.5 V
Output load: See figures (Including scope and jig)
5V
Dout Zo=50
RL=50
Dout
255
480
5 pF
1.5 V
Output load (A)
Output load (B)
(for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW)
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to outpput valid
Output hold from address change
Chip select to output in low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
Output disable to output in high-Z
HM624100H
-10
Symbol Min Max
tRC 10 —
tAA — 10
tACS — 10
tOE — 5
tOH 3 —
tCLZ 3 —
tOLZ 0 —
tCHZ — 5
tOHZ — 5
-12
Min
12
3
3
0
-15
Max Min
— 15
12 —
12 —
6—
—3
—3
—0
6—
6—
Max Unit Notes
— ns
15 ns
15 ns
7 ns
— ns
— ns 1
— ns 1
7 ns 1
7 ns 1
6

6 Page



ページ 合計 : 13 ページ
 
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[ HM624100HJP-15 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
HM624100HJP-10

4M High Speed SRAM (1-Mword x 4-bit)

Hitachi Semiconductor
Hitachi Semiconductor
HM624100HJP-12

4M High Speed SRAM (1-Mword x 4-bit)

Hitachi Semiconductor
Hitachi Semiconductor
HM624100HJP-15

4M High Speed SRAM (1-Mword x 4-bit)

Hitachi Semiconductor
Hitachi Semiconductor


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