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Número de pieza | HM624100HCJP-10 | |
Descripción | 4M High Speed SRAM (1-Mword x 4-bit) | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HM624100HCJP-10 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
No Preview Available ! HM624100HC Series
4M High Speed SRAM (1-Mword × 4-bit)
ADE-203-1198 (Z)
Preliminary
Rev. 0.0
Nov. 30, 2000
Description
The HM624100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed
access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing
technology. It is most appropriate for the application which requires high speed and high density memory,
such as cache and buffer memory in system. The HM624100HC is packaged in 400-mil 32-pin SOJ for high
density surface mounting.
Features
• Single 5.0 V supply : 5.0 V ± 10 %
• Access time 10 ns (max)
• Completely static memory
No clock or timing strobe required
• Equal access and cycle times
• Directly TTL compatible
All inputs and outputs
• Operating current : 140 mA (max)
• TTL standby current : 40 mA (max)
• CMOS standby ccurrent : 5 mA (max)
: 1.2 mA (max) (L-version)
• Data retension current : 0.8 mA (max) (L-version)
• Data retension voltage : 2.0 V (min) (L-version)
• Center VCC and VSS type pinout
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest
Hitachi’s Sales Dept. regarding specification.
1 page Operation Table
CS OE
H×
LH
LL
LH
LL
Note: ×: H or L
WE
×
H
H
L
L
HM624100HC Series
Mode
Standby
Output disable
Read
Write
Write
VCC current
ISB, ISB1
I CC
I CC
I CC
I CC
I/O
High-Z
High-Z
Dout
Din
Din
Ref. cycle
—
—
Read cycle (1) to (3)
Write cycle (1)
Write cycle (2)
Absolute Maximum Ratings
Parameter
Symbol
Value
Supply voltage relative to VSS
Voltage on any pin relative to VSS
Power dissipation
Operating temperature
VCC
VT
PT
Topr
–0.5 to +7.0
–0.5*1 to VCC+0.5*2
1.0
0 to +70
Storage temperature
Tstg –55 to +125
Storage temperature under bias
Tbias
–10 to +85
Notes: 1. VT (min) = –2.0 V for pulse width (under shoot) 6 ns.
2. VT (max) = VCC + 2.0 V for pulse width (over shoot) 6 ns.
Unit
V
V
W
°C
°C
°C
Recommended DC Operating Conditions (Ta = 0 to +70°C)
Parameter
Symbol Min
Typ
Supply voltage
VCC*3
VSS * 4
4.5
0
5.0
0
Input voltage
VIH 2.2
—
VIL –0.5*1
—
Notes: 1. VIL (min) = –2.0 V for pulse width (under shoot) 6 ns.
2. VIH (max) = VCC + 2.0 V for pulse width (over shoot) 6 ns.
3. The supply voltage with all VCC pins must be on the same level.
4. The supply voltage with all VSS pins must be on the same level.
Max
5.5
0
VCC + 0.5*2
0.8
Unit
V
V
V
V
5
5 Page Write Timing Waveform (2) (CS Controlled)
HM624100HC Series
Address
CS *3
WE *3
Dout
Din
tWC
Valid address
tCW
tWR
tAW
tWP
tAS
tWHZ
tOW
High impedance*5
tDW tDH
*4 Valid data
*4
11
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet HM624100HCJP-10.PDF ] |
Número de pieza | Descripción | Fabricantes |
HM624100HCJP-10 | 4M High Speed SRAM (1-Mword x 4-bit) | Hitachi Semiconductor |
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