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HM10S604 の電気的特性と機能

HM10S604のメーカーはHynix Semiconductorです、この部品の機能は「CMOS TFT-LCD SOURCE DRIVER」です。


製品の詳細 ( Datasheet PDF )

部品番号 HM10S604
部品説明 CMOS TFT-LCD SOURCE DRIVER
メーカ Hynix Semiconductor
ロゴ Hynix Semiconductor ロゴ 




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HM10S604 Datasheet, HM10S604 PDF,ピン配置, 機能
Electronics Industries
HM10S604 PRELIMINARY SPEC
CMOS TFT-LCD SOURCE DRIVER
HM10S604
420/402CH TFT-LCD SOURCE DRIVER
PRELIMINARY
SPECIFICATION
• CONFIDENTIAL & PROPRIETARY
 

1 Page





HM10S604 pdf, ピン配列
Functional Block Diagram
HM10S604 PRELIMINARY SPEC
L/R DCLK
DEIO1
RVRS1
DA0 ~ DA5
DB0 ~ DB5
DC0 ~ DC5
DD0 ~ DD5
DE0 ~ DE5
DF0 ~ DF5
6
6
6
6
6
6
Buffer
6
6
6
6
6
6
RVRS2
70 Bit Shift Register
.......
DEIO2
10
Voltage Reference
For Gamma Correction
(GH63/GH47/GH31/GH15/GH0
GL63/GL47/GL31/GL15/GL0)
LP
BC
420/402 x 6 Bit x 2Line Latch
6 6 6 .....................
Digital to Analog Converter
......................
Output Buffer
66
LOAD
POLC
OUT1
OUT420
• CONFIDENTIAL & PROPRIETARY
 


3Pages


HM10S604 電子部品, 半導体
HM10S604 PRELIMINARY SPEC
TERMINAL
NAME
FUNCTION
I/O
DESCRIPTION
OUT1 ~
OUT420
LCD control
output terminal
O Sub-pixel output, provides 64 gray signals to the LCD panel.
LCD drive capacity
Switched LCD drive capacity : BC = H : heavy load mode
BC I
switching terminal
BC = L : spec-load mode
Reduces charge and discharge current to a load
Low power mode
LP I LP = H : normal mode
selection terminal
LP = L : low power mode
Detailed description
Image signal capture
DEIOn=H(n=1 or n=2) is captured internally at the leading edge of DCLK. After the decay of DEIOn, the image signal
data are captured in the internal latch with the rise of the next DCLK.
If DEIOn receives an input in the meantime, new image signal data is captured at the rise of the next DCLK after
DEIOn decays.
It is possible to reverse the input data for each port by means of the RVRS1 and RVRS2.
Output expansion
The number of image signal output terminals can be expanded by cascading these devices,thereby enabling
compatibility with large screens. Expansion is controlled by using the L/R terminal:
L/R=L : the previous stage DEIO1 terminals is connected to the next stage DEIO2, and input terminals other
than DEIO1 and DEIO2 are connected together on each device.
L/R=H : the previous stage DEIO2 terminals is connected to the next stage DEIO1, and input terminals other
than DEIO1 and DEIO2 are connected together on each device
Relationship between input data values and output voltage
The output voltage is determined by the input data value and the 10 gamma correction potentials, Also, since
the output voltage is compatible with dot reverse driving, it is possible to output gradation voltages for the
opposing electrode voltages with polarities that differ for even and odd numbered outputs.
Input potentials with the same polarities relative to the opposing electrode voltages should be applied for
GH63/GL63,GH47/GL47,GH31/GL31,GH15/GL15,GH0/GL0 of the gamma correction reference power
supply.
Reference potential input for correction ( i.e. GH63/GL63,GH47/GL47,GH31/GL31,GH15/GL15,GH0/GL0 )
should be applied externally as desired. Reference potential should be maintained during gradation voltage
output. Refer to the operating conditions for the relative magnitude of each potential.
• CONFIDENTIAL & PROPRIETARY
 

6 Page



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共有リンク

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部品番号部品説明メーカ
HM10S604

CMOS TFT-LCD SOURCE DRIVER

Hynix Semiconductor
Hynix Semiconductor


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