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HS-1840ARH の電気的特性と機能

HS-1840ARHのメーカーはIntersil Corporationです、この部品の機能は「Rad-Hard 16 Channel BiCMOS Analog Multiplexer」です。


製品の詳細 ( Datasheet PDF )

部品番号 HS-1840ARH
部品説明 Rad-Hard 16 Channel BiCMOS Analog Multiplexer
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HS-1840ARH Datasheet, HS-1840ARH PDF,ピン配置, 機能
Rad-Hard 16 Channel BiCMOS Analog Multiplexer with
High-Z Analog Input Protection
HS-1840ARH, HS-1840AEH,
HS-1840BRH, HS-1840BEH
The HS-1840ARH, HS-1840AEH, HS-1840BRH and HS-1840BEH are
radiation hardened, monolithic 16 channel multiplexers constructed
with the Intersil Rad-Hard Silicon Gate, bonded wafer, Dielectric
Isolation process. They are designed to provide a high input impedance
to the analog source if device power fails (open), or the analog signal
voltage inadvertently exceeds the supply by up to 35V, regardless of
whether the device is powered on or off. Excellent for use in redundant
applications, since the secondary device can be operated in a standby
unpowered mode affording no additional power drain. More
significantly, a very high impedance exists between the active and
inactive devices preventing any interaction. One of sixteen channel
selections is controlled by a 4-bit binary address plus an Enable-Inhibit
input which conveniently controls the ON/OFF operation of several
multiplexers in a system. All inputs have electrostatic discharge
protection. The HS-1840ARH, HS-1840AEH, HS-1840BRH and
HS-1840BEH are processed and screened in full compliance with
MIL-PRF-38535 and QML standards. The devices are available in a
28 Ld SBDIP and a 28 Ld Ceramic Flatpack.
Specifications for Rad Hard QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are contained in
SMD 5962-95630.
Features
• Electrically screened to SMD # 5962-95630
• QML qualified per MIL-PRF-38535 requirements
• Pin-to-pin for Intersil’s HS-1840RH and HS-1840/883S
• Improved radiation performance
- Gamma dose () 3x105RAD(Si)
• Improved rDS(ON) Linearity
• Improved access time 1.5µs (Max) over temp and post rad
• High analog input impedance 500Mduring power loss (open)
35V input overvoltage protection (power on or off)
• Dielectrically isolated device islands
• Excellent in Hi-Rel redundant systems
• Break-before-make switching
• No latch-up
Pin Configuration
HS1-1840ARH, HS1-1840AEH, HS1-1840BRH,
HS1-1840BEH
(28 LD SBDIP) CDIP2-T28
TOP VIEW
+VS 1
NC 2
NC 3
IN 16 4
IN 15 5
IN 14 6
IN 13 7
IN 12 8
IN 11 9
IN 10 10
IN 9 11
GND 12
(+5VS) VREF 13
ADDR A3 14
28 OUT
27 -VS
26 IN 8
25 IN 7
24 IN 6
23 IN 5
22 IN 4
21 IN 3
20 IN 2
19 IN 1
18 ENABLE
17 ADDR A0
16 ADDR A1
15 ADDR A2
HS9-1840ARH, HS9-1840AEH, HS9-1840BRH, HS9-1840BEH
(28 LD FLATPACK) CDFP3-F28
TOP VIEW
+VS
NC
NC
IN 16
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
IN 9
GND
(+5VS) VREF
ADDR A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 OUT
27 -VS
26 IN 8
25 IN 7
24 IN 6
23 IN 5
22 IN 4
21 IN 3
20 IN 2
19 IN 1
18 ENABLE
17 ADDR A0
16 ADDR A1
15 ADDR A2
May 23, 2013
FN4355.6
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2002, 2009-2012, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 Page





HS-1840ARH pdf, ピン配列
HS-1840ARH, HS-1840AEH, HS-1840BRH, HS-1840BEH
Functional Diagram
VDD
A0
DIGITAL
ADDRESS
A1
A2
A3
EN
ADDRESS INPUT
BUFFER AND
LEVEL SHIFTER
1
MAINSWITCH 1
IN1
OUT
IN16
16
DECODERS
MAINSWITCH 16
MULTIPLEX
SWITCHES
NOTE: MAINSWITCH INXX: SWITCH ON, BODY TIED TO SOURCE
SWITCH OFF, BODY TIED TO VCC-0.7V
TABLE 1. TRUTH TABLE
A3 A2 A1 A0 EN
XXXXH
LLLLL
LLLHL
L LHL L
L LHHL
LHL L L
LHLHL
LHHL L
L HHH L
HL L L L
HLLHL
HLHL L
H L HH L
HHL L L
HH L H L
HHHL L
HHHH L
“ON” CHANNEL
None
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
3 FN4355.6
May 23, 2013


3Pages


HS-1840ARH 電子部品, 半導体
HS-1840ARH, HS-1840AEH, HS-1840BRH, HS-1840BEH
Ceramic Dual-In-Line Metal Seal Packages (SBDIP)
-A- -D-
E
-B-
bbb S C A - B S D S
c1 LEAD FINISH
BASE
METAL
(c)
b1
MM
(b)
SECTION A-A
BASE
PLANE
SEATING
PLANE
D
S1
b2
b
AA
e
ccc M C A - B S D S
S2 Q
-C- A
L
eA
eA/2
c
aaa M C A - B S D S
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. Dimension Q shall be measured from the seating plane to the
base plane.
6. Measure dimension S1 at all four corners.
7. Measure dimension S2 from the top of the ceramic body to the
nearest metallization or lead.
8. N is the maximum number of terminal positions.
9. Braze fillets shall be concave.
10. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
11. Controlling dimension: INCH.
D28.6 MIL-STD-1835 CDIP2-T28 (D-10, CONFIGURATION C)
28 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
- 0.232 - 5.92
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
- 1.490 - 37.85
-
E
0.500
0.610 12.70
15.49
-
e 0.100 BSC
2.54 BSC
-
eA 0.600 BSC
15.24 BSC
-
eA/2
0.300 BSC
7.62 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
5
S1 0.005 - 0.13 - 6
S2 0.005 - 0.13 - 7
90o 105o 90o 105o
-
aaa
- 0.015 - 0.38
-
bbb
- 0.030 - 0.76
-
ccc
- 0.010 - 0.25
-
M
-
0.0015
-
0.038
2
N 28
28 8
Rev. 0 5/18/94
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
6 FN4355.6
May 23, 2013

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共有リンク

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部品番号部品説明メーカ
HS-1840ARH

Rad-Hard 16 Channel BiCMOS Analog Multiplexer

Intersil Corporation
Intersil Corporation
HS-1840ARH-T

Radiation Hardened 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection

Intersil Corporation
Intersil Corporation


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