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PDF HS-117RH Data sheet ( Hoja de datos )
| Número de pieza | HS-117RH | |
| Descripción | Radiation Hardened Adjustable Positive Voltage Regulator | |
| Fabricantes | Intersil Corporation | |
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DATASHEET
Radiation Hardened Adjustable Positive Voltage
Regulator
HS-117RH, HS-117EH
The radiation hardened HS-117RH and HS-117EH are
adjustable positive voltage linear regulators capable of
operating with input voltages up to 40VDC. The HS-117EH
encompasses all of the production testing of the HS-117RH
and additionally is tested in the Intersil Enhanced Low Dose
Rate Sensitivity (ELDRS) product manufacturing flow. The
output voltage is adjustable from 1.25V to 37V with two
external resistors. The device is capable of sourcing from 5mA
to 1.25A max (0.5A max for the TO-39 package). Current
protection is provided by the on-chip thermal shutdown and
output current limiting circuitry.
The Intersil HS-117 has advantages over other industry
standard types, in that circuitry is incorporated to minimize the
effects of radiation and temperature on device stability.
Constructed in Intersil’s dielectrically isolated Rad Hard Silicon
Gate (RSG) process, the HS-117RH and HS-117EH are immune
to single event latch-up and has been specifically designed to
provide highly reliable performance in harsh radiation
environments.
Applications
• Adjustable Voltage Regulators
• Adjustable Current Regulators
Features
• Electrically screened to DLA SMD # 5962-99547
• Superior temperature stability
• Overcurrent and Over-temperature protection
• Wide input voltage range . . . . . . . . . . . . . . . . . . 4.25V to 40V
• Operating temperature range. . . . . . . . . . . .-55°C to +125°C
• QML Qualified per MIL-PRF-38535 requirements
• Radiation environment
- SEL/SEB LETTH (VS = ±20V). . . . . . . . . .87.4 MeV•cm2/mg
- Total Dose, High Dose Rate . . . . . . . . . . . . . . . 300krad(Si)
- Total Dose, Low Dose Rate . . . . . . . . . . . . . . . 100krad(Si)*
* Product capability established by initial characterization. The
EH version is acceptance tested on a wafer-by-wafer basis to
50krad(Si) at low dose rate.
Related Literature
• TID, “Total Dose Testing of the HS117 Linear Regulator”
• SEE, “SEE Testing of the HS117 Linear Regulator”
• ELDRS, “Low Dose Testing of HS117 to 100krad(Si)”
VIN
C1
HS-117EH
IN OUTOPUUTT
ADJUST
R1
VOUT
C2
R2
VOUT = VREF (1+R2/R1) + IADJ R2
FIGURE 1. TYPICAL APPLICATION
0.30
0.25
0.20
0.15
0.10 LOW DOSE RATE
0.05
HIGH DOSE RATE
0.00
-0.05
0
50 100 150 200 250 300
krad(Si)
FIGURE 2. VOUT SHIFT vs HIGH and LOW DOSE RATE RADIATION
March 25, 2014
FN4560.10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2001, 2012, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
HS-117RH, HS-117EH
Absolute Maximum Ratings
Input to Output Voltage Differential . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V
Input to Output Voltage Differential (Note 5) . . . . . . . . . . . . . . . . . . . . . 40V
Maximum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A
Maximum Power Dissipation TC = +25°C
HS2-117 (TO-39 Can) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8W
HS9S-117 (TO-257AA Flange Mount) . . . . . . . . . . . . . . . . . . . . . . . . . . 50W
HSYE-117 (SMD.5 CLCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27.5W
Maximum Power Dissipation TC = +100°C (Note 6)
HS2-117 (TO-39 Can) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3W
HS9S-117 (TO-257AA Flange Mount) . . . . . . . . . . . . . . . . . . . . . . . . . . 20W
HSYE-117 (SMD.5 CLCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11W
ESD Rating
Human Body Model (HBM) (Tested per MIL-PRF-883 3015.7) . . . 1500V
Machine Model (MM) (Tested per EIA/JESD22-A115-A) . . . . . . . . . 350V
Thermal Information
Thermal Resistance (Typical)
JA (°C/W)
TO-39 (Notes 3, 4, 6) . . . . . . . . . . . . . . . . . . . .
125
TO-257AA (Notes 3, 4, 6) . . . . . . . . . . . . . . . . .
26
SMD.5 (Notes 3, 4, 6). . . . . . . . . . . . . . . . . . . .
42
JC (°C/W)
15
2.5
4.5
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Maximum Junction Temperature (TJMAX) . . . . . . . . . . . . . . . . . . . . .+175°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Input Voltage Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.25V to 40V
Output Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.25V to 37V
Minimum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
5. The maximum supply limit specified is for operation in a heavy ion environment at an LET = 87.4MeV*cm2/mg.
6. The linear derating factor for TO-39 package is 0.067 W/°C, for TO-257AA package is 0.4 W/°C, for the SMD.5 package is 0.22 W/°C
Electrical Specifications VDIFF = 3V, TA = 25°C, unless otherwise noted. Boldface limits apply across the operating temperature range,
-55°C to +125°C.
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN MAX
(Note 7) TYP (Note 7) UNITS
VREF
RLINE
RLOAD
Reference Voltage
Line Regulation
Load Regulation
VDIFF = 3V, VDIFF = 40V,
5.0mA ≤ IOUT ≤ 5.5mA
VREF = VOUT - VADJ, 3V ≤ VDIFF ≤ 40V,
5.0mA ≤ IOUT ≤ 5.5mA
VDIFF = 3V, 5mA ≤ IOUT ≤ 1.25A
TO-257AA and SMD.5 packages only
1.20
-0.02
-1.5
1.255
0.005
-0.1
1.30
0.02
1.5
V
%
%
VDIFF = 3V, 5mA ≤ IOUT ≤ 500mA
TO-39 package
-1.5 -0.8 1.5
%
IADJ
dIADJ
IOUT
Adjust Pin Current
Adjust Pin Current Change
Maximum Output Current
VDIFF = 3V, VDIFF = 40V,
5.0mA ≤ IOUT ≤ 5.5mA
3V IADJ - 40V IADJ
5.0mA ≤ IOUT ≤ 5.5mA
TO-257AA and SMD.5 packages only
TO-39 package
-6
1.25
0.5
64
2.36
100
6
µA
µA
A
A
TON
Isc
OT
OT_HYS
VIN Applied to VOUT Turn-on
Max. Output Short Circuit Current Limit
Over-temperature Shutdown
Over-temperature Hysteresis
VOUT = 0V
0.2
3
150 175
20
ms
A
°C
°C
Submit Document Feedback
5
March 25, 2014
FN4560.10
5 Page 
HS-117RH, HS-117EH
T0-257AA Package
Characteristics
Weight of Packaged Device
4.50 Grams (Typical)
Case Characteristics
Finish: Gold
Potential: Unbiased
T0-39 Package Characteristics
Weight of Packaged Device
0. 91 Grams (Typical)
Case Characteristics
Finish: Steel, Gold
Potential: Unbiased
SMD.5 CLCC Package
Characteristics
Weight of Packaged Device
0.91 Grams (Typical)
Case Characteristics
Finish: Gold, Ceramic
Potential: Unbiased
Die Characteristics
Die Dimensions
2616µm x 2794µm (103mils x 110mils)
Thickness: 483µm ± 25µm (19mils ± 1mil)
Interface Materials
GLASSIVATION
Type: PSG
Thickness: 8kÅ ± 1kÅ
TOP METALLIZATION
Type: Al/Cu/Si (98.75%/0.5%/0.75%)
Thickness: 16kÅ
BACKSIDE FINISH
Gold
Assembly Related Information
SUBSTRATE POTENTIAL
Unbiased (DI)
Additional Information
WORST CASE CURRENT DENSITY
< 2 x 105 A/cm2
PROCESS
Dielectrically Isolated RH - Si-GATE
Metallization Mask Layout
TRANSISTOR COUNT:
96
VIN_2
VIN_1
OUT_1
ADJ
Submit Document Feedback 11
OUT_2
VOUTK
March 25, 2014
FN4560.10
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HS-117RH.PDF ] | |
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