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HV9906 の電気的特性と機能

HV9906のメーカーはSupertex Incです、この部品の機能は「Simple Off-Line/PFC & >9V DC/DC Switcher」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV9906
部品説明 Simple Off-Line/PFC & >9V DC/DC Switcher
メーカ Supertex Inc
ロゴ Supertex  Inc ロゴ 




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HV9906 Datasheet, HV9906 PDF,ピン配置, 機能
HV9906
Initial Release
HV9906 FlexSwitchTM
(Simple Off-Line/PFC & >9V DC/DC Switcher)
Features
General Description
Drive one or hundreds of LEDs including White LEDs
Programmable Current Source (mA to A)
Programmable Voltage Source (Steps Up or Down)
Integrator Lock Loop Technology (IL2)
o Built in Soft Start
o Allows Discontinuous Feedback
o Eliminates Compensation Components
o Eliminates Output Averaging Filters
o Inherent Dither to Reduce EMI
Eliminates High Voltage Input Electrolytic Capacitor
Smallest and Most Reliable Off-Line Solution
Isolated or Non-Isolated Applications
Can be Operated Directly from Rectified AC Mains
10V to 400V Input Range Internal Regulator
<1.5mA Operating Supply Current
Programmable Feed Forward Regulation
Programmable Feedback Sense Threshold (mV to V)
Integrating Differential Sense Feedback
Seamlessly Change from AC to Battery Operation
Applications
LED driver
Power Factor Correction
Constant Current or Voltage Source
Battery Charger / PWM Housekeeping Supplies
Traffic Lights / Street Lights
Back Lighting of Flat Panel Displays
Advertising Signs
Automotive
The Supertex HV9906 allows the development of the smallest
possible, most reliable, offline and wide DC/DC conversion range
converters for driving LEDs and other applications. The HV9906
combines internally all the components required to operate directly
from the rectified AC line with a feedback mechanism that
eliminates filters & compensation components, and which can
close the loop with feedback from a discontinuous waveform (eg.
LED current).
The HV9906 is capable of driving multiconverters, which have
been shown to provide the best performance to component count
trade off for wide conversion range applications like offline
converters. Applicable multiconverters include bucking & boosting
topologies, in isolated & non-isolated configurations, as well as
power factor correcting topologies from <1W up to 150W.
Proper choice of external components will allow the programming
of currents from <1mA to several amps and will allow stepping up
or stepping down from the input without the need to change
components. For example, the same HV9906 converter nominally
regulating to 60VDC output may operate from 12VDC, or from
rectified AC input to 265VRMS.
The HV9906 utilizes a programmable inversely proportional fast
feed forward algorithm to calculate output on time and a novel
Integrating Lock Loop (IL2) feedback with programmable threshold
differential sensing. The sensed feedback may be positive or
negative with respect to ground and the signal may be
discontinuous. In some topologies this control method permits the
elimination of the bulky input filter capacitor (a small high voltage
ceramic or film capacitor is required to maintain a high frequency
path). This algorithm when used with certain multiconverters such
as the flyback-buck, with a fixed load, results in near constant
frequency with only a small dither which helps meet FCC
requirements.
Typical Application Circuit
12VDC to 400VDC
or
65VAC to 280VAC
1N4007
D1 D2
D5
MURS160
D6
MURS160
L2
15uH
D4 D3
C1
0.047uF
400V
R1
8M
R2
100k
C2
1uF
to
6.8uF
C3
0.033uF
L1
56uH
D7
MURS160
C4
Optional
U1
+Vin GATE
Von NS
HV9906
Vdd PS
AGND PGND
M1
IRFBC30AF
R3
900k
R4
300k
NPN Bipolar Transistor Array or Matched 2N2222
Q1 Q2
Q3
Q25
Negative Voltage
-
+
LED-1
Row 1
LED-1
Row 2
LED-1
Row 3
LED-1
Row 25
20mA
20mA
20mA
20mA
LED-9
Row 1
LED-9
Row 2
LED-9
Row 3
LED-9
Row 25
R5
LED-10
LED-10
LED-10
100
Row 2
Row 3
Row 25
1 07/23/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com

1 Page





HV9906 pdf, ピン配列
HV9906
Pinout
Pin Description
+Vin 1
Von 2
Vdd 3
HV9906
8 GATE
7 PGND
6 NS
+VIN This pin is the input to the internal linear regulator.
VON The voltage applied to this pin by a resistor voltage divider
from +VIN controls the on time (pulse width) of the gate output.
VDD This pin is the output of the internal linear regulator and the
supply pin for the internal circuits. It must be bypassed with a low
ESR capacitor to provide a low impedance path for the gate drive
and be capable of storing sufficient energy so that the voltage does
not decay below the UVLO threshold during the time when the
input voltage is below the minimum required by the regulator.
AGND – This pin is the common connection for analog circuits.
AGND 4
5 PS
GATE – This pin is the output for driving the gate of an external N-
channel MOSFET.
PGND – This is the common connection for the GATE drive circuit.
NS – This pin is the negative terminal of the differential sense
feedback circuit.
PS – This pin is the positive terminal of the differential sense
feedback circuit.
__________________________________________________________________________________________________________________
Functional Block Diagram
+Vin
High Voltage
Regulator
Von
Vdd
AGND
UVLO
and
POR
Bandgap
Reference
1V
Vref
Vdd
Vdd
C
VCO
C
Reset Pulse
Delay Sample Pulse
Delay
Vdd
1V
1V
Vref
R
_
Q Q Driver
GATE
S
PGND
NS
PS
3 07/23/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com


3Pages


HV9906 電子部品, 半導体
Design Information
Programming On Time
The instantaneous voltage applied to the VON pin determines the
gate drive output on time for the VCO cycle. The on time is
inversely proportional to the voltage applied to the VON pin and may
be calculated using the following equation:
( )P VON
0.085

+
0.65
VON

×
10 6
Where the effective control range of VON is limited between 0.2V
and 6V. For VON = 0V P(VON) defaults to a nominal maximum of
17.8µS.
Depending on the converter topology and worst case operating
conditions the minimum on time and thus the duty cycle may be
programmed.
Programming the Sense Inputs
The PS and NS sense pins are regulated at +1V and each needs
to be programmed to source the same current at the converter
output regulation set point.
In order to calculate the values of RNS and RPS, the maximum
sense current, which will avoid integrator saturation, must be
determined. Since by design the circuit will inherently soft start
from its lowest frequency, the designer only needs to establish the
lowest operating frequency (fMIN) for the design, which corresponds
to minimum converter output power under closed loop control.
Once this frequency is established the maximum PS pin sense
current IPS(MAX), which occurs during start up when VPSENSE =
VNSENSE, can be calculated using the following equation.
IPS(MAX) = CMIN × VSAT × fMIN
Where CMIN is the minimum value of the integrator capacitors, VSAT
is the minimum saturation level of the integrators and fMIN is the
minimum operating frequency of the converter. Inserting these
values the above equation can be simplified.
IPS(MAX) = (0.95) × (20 × 1012 ) × 6 × fMIN
IPS(MAX) = 1.14 × 1010 × fMIN
For the general case, where at regulation neither sensed node
might be at ground potential, the following equation may be used
to calculate the required RPS resistor value where VPSENSE(MIN) is the
most negative value that the node will see during starting or normal
operation.
RPS
=
1V VPSENSE(MIN)
IPS(MAX)
Once the value of RPS has been determined the IPS and INS sense
currents at the regulation point can be calculated and the value of
RNS can be determined as follows.
IPS
= INS
=
1V
VPSENSE
RPS
RNS
=
1V VNSENSE
INS
HV9906
Where INS = IPS = average current in the NS and PS pins at stable
output regulation, VNSENSE is the most negative sensed node
voltage with respect to +1V and VPSENSE is the least negative
sensed node voltage with respect +1V. VNSENSE and VPSENSE must
be less than +1V and VNSENSE is always more negative than
VPSENSE.
Example 1.
For a converter operating at a minimum frequency of 50KHz and
sensing a –1V feedback node voltage with respect to ground, the
resistors connected in series with the PS and NS pins will be
determined as follows.
IPS(MAX) = 1.14 × 1010 × 5 × 104 = 5.7µA
To provide a margin of safety let IPS(MAX) = 5µA. Since in this
configuration the resistor in series with the PS pin is connected to
ground, the sense node voltage VPSENSE(MIN) = 0V.
RPS
=
1V
VPSENSE(MIN)
IPS(MAX)
=
1(0)
5 × 106
= 200k
IPS
= INS
=
1V
VPSENSE
RPS
=
10
200k
= 5µA
RNS
=
1V
VNSENSE
INS
=
1(1)
5 × 106
= 400k
Example 2.
For a converter operating at a minimum frequency of 100KHz and
sensing a +0.5V feedback node voltage with respect to ground, the
resistors connected in series with the PS and NS pins will be
determined as follows.
IPS(MAX) = 1.14 × 1010 × 1× 105 = 11.4µA
To provide a margin of safety let IPS(MAX) = 10µA. In this
configuration the most negative value of VPSENSE(MIN) occurs during
startup at which time it is 0V.
RPS
=
1V
VPSENSE(MIN)
IPS(MAX)
=
10
10 × 106
= 100k
IPS
= INS
=
1V
VPSENSE
RPS
=
1(+0.5)
100k
= 5µA
RNS
=
1V
VNSENSE
INS
=
10
5 × 106
= 200k
Protection
The HV9906 used as a current source is inherently protected in the
case of an output short. Over voltage protection is easily
accomplished, in the flyback-buck application for example, with no
more than two diodes. Simple protection for voltage mode
applications, and other topologies is easy to accomplish. Call for
more information.
6 07/23/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com

6 Page



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