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HV9123 の電気的特性と機能

HV9123のメーカーはSupertex Incです、この部品の機能は「Current-Mode PWM Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV9123
部品説明 Current-Mode PWM Controller
メーカ Supertex Inc
ロゴ Supertex  Inc ロゴ 




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HV9123 Datasheet, HV9123 PDF,ピン配置, 機能
Supertex inc.
HV9123
High-Voltage,
Current-Mode PWM Controller
Features
10 to 450V input voltage range
<1.3mA supply current
>1.0MHz clock
>20:1 dynamic range @ 500kHz
99% Maximum duty cycle version
Low internal noise
Applications
Off-line high frequency power supplies
Universal input power supplies
High density power supplies
Very high efficiency power supplies
Extra wide load range power supplies
General Description
The Supertex HV9123 is a Switch Mode Power Supply
(SMPS) controller subsystem that can start and run directly
from almost any DC input, from a 12V battery to a rectified
and filtered 240VAC line. It contains all the elements required
to build a single-switch converter except for the switch,
magnetic assembly, output rectifier(s) and filter(s).
A unique input circuit allows the HV9123 to self-start directly
from a high voltage input, and subsequently take the power
to operate from one of the outputs of the converter it is
controlling, allowing very efficient operation while maintaining
input-to-output galvanic isolation limited in voltage only by
the insulation system of the associated magnetic assembly.
A ±2% internal bandgap reference, internal operational
amplifier, very high speed comparator, and output buffer
allow production of rugged, high performance, high efficiency
power supplies of 50W or more, which can still be over 80%
efficient at outputs of 1.0W or less. The wide dynamic range of
the controller system allows designs with extremely wide line
and load variations with much less difficulty and much higher
efficiency than usual. The exceptionally wide input voltage
range also allows better usage of energy stored in input
dropout capacitors than with other PWM ICs. Remote on/off
controls allow either latching or nonlatching remote shutdown.
During shutdown, the power required is under 6.0mW.
For detailed circuit and application information, please
refer to application notes AN-H13, AN-H21 to AN-H24.
Functional Block Diagram
FB
15 (19)
COMP DISCHARGE
OSC
IN
OSC
OUT
8 (10)
11 (14)
VREF
16 (20)
BIAS
7 (9)
VDD
Error
Amplifier
+
4V
2V
REF
GEN
Current
Sources
+
+
To
Internal
Circuits
1.2V
OSC
Modulator
Comparator
R
Q
S
Current Limit
Comparator
1 (3)
+VIN
8.1V
+ 8.6V
Pre-regulator/Startup
Note:
Pin numbers in parentheses are for PLCC package.
+
Undervoltage
Comparator
S
Q
R
Doc.# DSFP-HV9123
C031314
To VDD
5 (6)
OUTPUT
6 (8)
-VIN
4 (5)
SENSE
VDD
12 (16)
SHUTDOWN
13 (17)
RESET
Supertex inc.
www.supertex.com

1 Page





HV9123 pdf, ピン配列
HV9123
Electrical Characteristics
(Unless otherwise specified, VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390kΩ, ROSC = 330kΩ, TA = 25°C.)
Sym Parameter
# Min
Typ Max Units Conditions
Reference
VREF Output voltage
-
ZOUT Output impedance
ISHORT Short circuit current
ΔVREF Change in VREF with temperature
Oscillator
fMAX Oscillator frequency
fOSC Initial accuracy1
ΔVOSC
TCOSC
Voltage stability
Temperature coefficient
PWM
DMAX
Maximum duty cycle
Deadtime
DMIN Minimum duty cycle
Maximum pulse width before
pulse drops out
Current Limit
VLIM Maximum input signal
#
-
#
-
-
-
-
#
#
#
-
#
-
3.92
3.84
15
-
-
1.0
80
160
-
-
95
-
-
-
1.0
4.00
4.00
30
125
0.25
4.08
4.16
45
250
-
V
μA
mV/°C
RL = 10MΩ
RL = 10MΩ, TA = -55°C to 125°C
---
VREF = -VIN
TA = -55°C to 125°C
3.0 - MHz ROSC = 0Ω
100 120
200 240
kHz ROSC = 330kΩ
ROSC = 150kΩ
- 15 % 9.5V < VDD < 13.5V
170 - ppm/°C TA = -55°C to 125°C
97 99
225 -
-0
80 125
% ---
ns ---
% ---
ns ---
1.2 1.4
V VFB = 0V
tD Delay to output
#-
80 120
ns VSENSE = 1.5V, VCOMP ≤ 2.0V
Error Amplifier
VFB Feedback voltage
IIN Input bias current
VOS Input offset voltage
AVOL Open loop voltage gain
GB Unity gain bandwidth
-
-
-
#
#
ZOUT Out impedance
ISOURCE Output source current
ISINK Output sink current
PSRR Power supply rejection
Notes:
# Guaranteed by design.
1. Stray capacitance on OSC In pin must be ≤5pF.
#
-
-
#
3.92 4.00 4.08
- 25 500
nulled during trim
60 80 -
1.0 1.3 -
see Fig. 1
-1.4 -2.0 -
0.12 0.15 -
see Fig. 2
V
nA
-
dB
MHz
Ω
mA
mA
dB
VFB shorted to COMP
VFB = 4.0V
---
---
---
---
VFB = 3.4V
VFB = 4.5V
---
Doc.# DSFP-HV9123
C031314
Supertex inc.
3 www.supertex.com


3Pages


HV9123 電子部品, 半導体
HV9123
amplifier). This allows overriding the internal reference with
a low-impedance voltage source ≤6.0V. Using an external
reference reinstates the input offset voltage of the error am-
plifier, and its effect of the exact value of feedback voltage
required. In general, because the reference voltage of the
Supertex HV9123 is not noisy, as some previous examples
have been, overriding the reference should seldom be nec-
essary.
Because the reference of the HV9123 is a high impedance
node, and usually there will be significant electrical noise
near it, a bypass capacitor between the reference pin and
VSS is strongly recommended. The reference buffer ampli-
fier is intentionally compensated to be stable with a capaci-
tive load of 0.01 to 0.1µF.
Error Amplifier
The error amplifier in the HV9123 is a true low-power dif-
ferential input operational amplifier intended for around-the-
amplifier compensation. It is of mixed CMOS-bipolar con-
struction: A PMOS input stage is used so the common-mode
range includes ground and the input impedance is very high.
This is followed by bipolar gain stages which provide high
gain without the electrical noise of all-MOS amplifiers. The
amplifier is unity-gain stable.
Current Sense Comparators
The HV9123 uses a true dual-comparator system with in-
dependent comparators for modulation and current limiting.
This allows the designer greater latitude in compensation
design, as there are no clamps (except ESD protection) on
the compensation pin. Like the error amplifier, the compara-
tors are of low-noise BiCMOS construction.
Remote Shutdown
The SHUTDOWN and RESET pins of the HV9123 can be
used to perform either latching or non-latching shutdown of
a converter as required. These pins have internal current
source pull-ups so they can be driven from open-drain logic.
When not used, they should be left open, or connected to
VDD.
Output Buffer
The output buffer of the HV9123 is of standard CMOS con-
struction (P-channel pull-up, N-channel pull-down). Thus the
body-drain diodes of the output stage can be used for spike
clipping if necessary, and external Schottky diode clamping
of the output is not required.
Truth Table
SHUTDOWN
H
H
L
L
L→H
RESET
H
H→L
H
L
L
Output
Normal operation
Normal operation, no change
Off, not latched
Off, latched
Off, latched, no change
Shutdown Timing Waveforms
1.5V
SENSE
0
50%
VDD
OUTPUT
0
tD
tR ≤ 10ns
90%
VDD
SHUTDOWN
0
VDD
RESET
0
50%
tSW
50%
tLW
VDD
SHUTDOWN
0
VDD
OUTPUT
0
50%
tF ≤ 10ns
tSD
90%
50%
tR, tF ≤ 10ns
50%
50%
tRW
Doc.# DSFP-HV9123
C031314
Supertex inc.
6 www.supertex.com

6 Page



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共有リンク

Link :


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