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HV9102PJ の電気的特性と機能

HV9102PJのメーカーはSupertex Incです、この部品の機能は「High-Voltage Switchmode Controllers with MOSFET」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV9102PJ
部品説明 High-Voltage Switchmode Controllers with MOSFET
メーカ Supertex Inc
ロゴ Supertex  Inc ロゴ 




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HV9102PJ Datasheet, HV9102PJ PDF,ピン配置, 機能
HV9100
HV9102
HV9103
High-Voltage Switchmode Controllers with MOSFET
Ordering Information
+VIN
Min Max
10V 70V
Feedback
Max
Voltage Duty Cycle
± 1.0%
49%
MOSFET Switch
BVDSS
150V
RDS (ON)
5.0
10V 120V ± 1.0%
49%
200V
7.0
10V 120V ±1.0%
99%
200V
7.0
Standard temperature range for all parts is industrial (-40° to +85°C).
Package Options
14 Pin Plastic DIP 20 Pin Plastic PLCC
HV9100P
HV9100PJ
HV9102P
HV9102PJ
HV9103P
HV9103PJ
Features
General Description
10 to 120V input range
200V, 7.0output MOSFET
Current-Mode Control
High Efficiency
Up to 1MHz Internal Oscillator
Internal Start-up Circuit
Applications
DC/DC Converters
Distributed Power Systems
ISDN Equipment
PBX Systems
Modems
The Supertex HV9100 through HV9103 are a series of BiCMOS/
DMOS single-output, pulse width modulator ICs intended for use
in high-speed high-efficiency switchmode power supplies. They
provide all the functions necessary to implement a single-switch
current-mode PWM, in any topology, with a minimum of external
parts.
Utilization of Supertex proprietary BiCMOS/DMOS technology
results in a device with one tenth of the operating power of
conventional bipolar PWM ICs, which can operate at more than
twice their switching frequency. Dynamic range for regulation is
also increased, to approximately 8 times that of similar bipolar
parts. They start directly from any DC input voltage between 10
and 70VDC for the HV9100 or 10 to 120VDC for the HV9102 and
HV9103, requiring no external power resistor. The output stage
for the HV9100 is a 150V, 5.0 ohm MOSFET and for the HV9102
and HV9103 is a 200V, 7.0 ohm MOSFET. The clock frequency
is set with a single external resistor.
Accessory functions are included to permit fast remote shutdown
(latching or nonlatching), and undervoltage shutdown.
Absolute Maximum Ratings
+VIN, Input Voltage
120V
VDS 200V
VDD, Logic Voltage
15.0V
Input Voltage Logic, Linear, FB and Sense -0.3V to VDD+0.3V
ID (Peak)
2.5A
Storage Temperature
-65°C to 150°C
Power Dissipation, Plastic DIP
750mW
Power Dissipation, PLCC
1400mW
For detailed circuit and application information, please refer
to application notes AN-H13 and AN-H21 to AN-H24.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

1 Page





HV9102PJ pdf, ピン配列
HV9100/HV9102/HV9103
Electrical Characteristics (Continued)
(VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390K, ROSC = 330K,TA = 25°C, unless otherwise specified)
Symbol Parameters
Min Typ Max Unit Conditions
Pre-Regulator/Startup
+VIN Allowable Input Voltage
HV9100
HV9102/03
70 V IIN = 10µA
120
VTH
VLOCK
Input Leakage Current
VDD Pre-regulator Turn-off
Threshold Voltage
Undervoltage Lockout
10 µA VDD > 9.4V
7.8 8.6 9.4 V IPREREG = 10µA
7.0 8.1 8.9 V RL = 100from Drain to VDD
Supply
IDD Supply Current
IBIAS
Bias Current
VDD Operating Range
0.60 1.0 mA
0.55
20
mA Shutdown = -VIN
µA
9.0 13.5 V
Logic
tSD Shutdown Delay Time1
tSW Shutdown Pulse Width1
tRW RESET Pulse Width1
tLW Latching Pulse Width1
VIL Input Low Voltage
VIH Input High Voltage
IIH Input High Current
IIL Input Low Current
50 100 ns VSOURCE = -VIN
50 ns
50 ns
25 ns
2.0 V
7.0 V
1.0 5.0 µA VIN = 10V
-25 -35 µA VIN = 0V
MOSFET Switch
BVDSS Breakdown Voltage
RDS(ON) Drain-to-Source
On-resistance
HV9100
150
V VSOURCE = Shutdown = 0V,
HV9102/03
200
ID = 100µA,
TA = -55°C to 125°C
HV9100
3.5 5.0 VSOURCE = 0V, ID = 100mA
HV9102/03
7.0
IDSS OFF State Drain Leakage Current
CDS Drain Capacitance
Note:
1. Guaranteed by design. Not subject to production test.
10 µA VSOURCE = Shutdown = 0V,
VDRAIN = 100V
35 pF VDS = 25V, Shutdown = 0V
Truth Table
Shutdown
Reset
HH
H HL
LH
LL
LH
L
Output
Normal Operation
Normal Operation, No Change
Off, Not Latched
Off, Latched
Off, Latched, No Change
3


3Pages


HV9102PJ 電子部品, 半導体
Technical Description
Preregulator
The preregulator/startup circuit for the HV910x consists of a high-
voltage N-channel depletion-mode DMOS transistor driven by an
error amplifier to form a controlled current path between the VIN
terminal and the VDD terminal. Maximum current (about 20 mA)
occurs when VDD = 0, with current reducing as VDD rises. This path
shuts off altogether when VDD rises to somewhere between 7.8
and 9.4V, so that if VDD is held at 10 or 12V by an external source
(generally the supply the chip is controlling) no current other than
leakage is drawn through the high voltage transistor. This mini-
mizes dissipation.
An external capacitor between VDD and VSS is generally required
to store energy used by the chip during the time between shutoff
of the high voltage path and the VDD supplys output rising enough
to take over the powering of the chip. This capacitor generally also
serves as the output filter capacitor for that output from the supply.
1µF is generally sufficient to assure against double-starting.
Capacitors as small as 0.1µF can work when faster response from
the VDD line is required. Whatever capacitor is chosen should
have very good high frequency characteristics. Stacked polyester
or ceramic capacitors work well. Electrolytic capacitors are gen-
erally not suitable.
A common resistor divider string is used to monitor VDD for both
the undervoltage lockout circuit and the shutoff circuit of the high
voltage FET. Setting the undervoltage sense point about 0.6V
lower on the string than the FET shutoff point guarantees that the
undervoltage lockout always releases before the FET shuts off.
Bias Circuit
An external bias resistor, connected between the bias pin and VSS
is required to set currents in a series of current mirrors used by the
analog sections of the chip. Nominal external bias current require-
ment is 15 to 20µA, which can be set by a 390Kto 510K
resistor if a 10V VDD is used, or a 510Kto 680Kresistor if a 12V
VDD is used. A precision resistor is NOT required; ± 5% is fine.
For extremely low power operation, the value of bias current can
be reduced to as low as 5µA by further increases in the value of
the bias resistor. This will reduce quiescent current by about a
third, reduce bandwidth of the error amp by about half, and slow
the current sense comparator by about 30%.
Clock Oscillator
The clock oscillator of the HV910x consists of a ring of CMOS
inverters, timing capacitors, a capacitor discharge FET, and, in
the 50% maximum duty cycle versions, a frequency dividing flip-
flop. A single external resistor between the OSC In and OSC Out
pins is required to set oscillator frequency (see Fig. 4). For the
50% maximum duty cycle versions the Dischargepin is internally
connected to GND. For the 99% duty cycle version, Discharge
can either be connected to VSS directly or connected to VSS
through a resistor used to set a deadtime.
One difference exists between the Supertex HV910x and com-
petitive parts. The oscillator of the HV910x is shut off when a
shutoff command is received. This saves about 150µA of quies-
cent current, which aids in situations where an absolute minimum
of quiescent power dissipation is required.
HV9100/HV9102/HV9103
Reference
The reference consists of a stable bandgap reference followed by
a buffer amplifier which scales the voltage up to approximately
4.0V. The scaling resistors of the reference buffer amplifier are
trimmed during manufacture so that the output of the error
amplifier when connected in a gain of -1 configuration is as close
to 4.000V as possible. This nulls out any input offset of the error
amplifier. As a consequence, even though the observed refer-
ence voltage of a specific part may not be exactly 4V, the feedback
voltage required for proper regulation will be 4V.
A resistor of approximately 50Kis placed internally between the
output of the reference buffer amplifier and the circuitry it feeds
(reference output pin and NON-INVERTING input to the error
amplifier). This allows overriding the internal reference with a low-
impedance voltage source 6V. Using an external reference
reinstates the input offset voltage of the error amplifier, and its
effect of the exact value of feedback voltage required. In general,
because the reference voltage of the Supertex HV910x is not
noisy, as some previous devices have been, overriding the
reference should seldom be necessary.
Because the reference is a high impedance node, and usually
there will be significant electrical noise near it, a bypass capacitor
between the reference pin and VSS is strongly recommended. The
reference buffer amplifier is intentionally compensated to be
stable with a capacitive load of 0.01 to 0.1µF.
Error Amplifier
The error amplifier is a true low-power differential input opera-
tional amplifier intended for around-the-amplifier compensation.
It is of mixed CMOS-bipolar construction: a PMOS input stage is
used so the common-mode range includes ground and the input
impedance is very high. This is followed by bipolar gain stages
which provide high gain without the electrical noise of all-MOS
amplifiers. The amplifier is unity-gain stable.
Current Sense Comparators
The HV910x uses a true dual comparator system with indepen-
dent comparators for modulation and current limiting. This allows
the designer greater latitude in compensation design, as there are
no clamps (except ESD protection) on the compensation pin. Like
the error amplifier, the comparators are of low-noise BiCMOS
construction.
Remote Shutdown
The shutdown and reset pins can be used to perform either
latching or non-latching shutdown of a converter as required.
These pins have internal current source pull-ups so they can be
driven from open-drain logic. When not used, they should be left
open, or connected to VDD.
Main Switch
The main switch is a normal N-channel power MOSFET. Unlike
the situation with competitive devices, the body diode can be used
if desired without destroying the chip.
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部品番号部品説明メーカ
HV9102P

High-Voltage Switchmode Controllers with MOSFET

Supertex  Inc
Supertex Inc
HV9102PJ

High-Voltage Switchmode Controllers with MOSFET

Supertex  Inc
Supertex Inc


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