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PDF HV5408X Data sheet ( Hoja de datos )

Número de pieza HV5408X
Descripción 32-Channel Serial To Parallel Converter With High Voltage Push-Pull Outputs
Fabricantes Supertex Inc 
Logotipo Supertex  Inc Logotipo



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No Preview Available ! HV5408X Hoja de datos, Descripción, Manual

HV5308
HV5408
32-Channel Serial To Parallel Converter
With High Voltage Push-Pull Outputs
Ordering Information
Device
44 J-Lead Quad
44 J-Lead Quad
Ceramic Chip Carrier Plastic Chip Carrier
HV5308
HV5308DJ
HV5308PJ
HV5408
HV5408DJ
HV5408PJ
* For Hi-Rel process flows, please refer to perfer to page 5-3 in the Databook.
Package Options
44 Lead Quad
Plastic Gullwing
HV5308PG
HV5408PG
Die
HV5308X
HV5408X
44 J-Lead Quad
Ceramic Chip Carrier
(MIL-STD-883 Processed*)
RBHV5308DJ
RBHV5408DJ
Features
Processed with HVCMOS® technology
Low power level shifting
Source/sink current minimum 20mA
Shift register speed 8MHz
Latched data outputs
CMOS compatible inputs
Forward and reverse shifting options
Diode to VPP allows efficient power recovery
Absolute Maximum Ratings1
Supply voltage, VDD2
Supply voltage, VPP
Logic input levels2
Ground current3
-0.5V to +16V
-0.5V to +90V
-0.5 to VDD + 0.5V
1.5A
Continuous total power dissipation 4 Plastic
Ceramic
1200mW
1500mW
Operating temperature range
Plastic -40°C to +85°C
Ceramic -55°C to 125°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
260°C
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at
these extremes.
2. All voltages are referenced to GND.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.
General Description
The HV53 and HV54 are low voltage serial to high voltage
parallel converters with push-pull outputs. These devices have
been designed for use as drivers for AC-electroluminescent
displays. They can also be used in any application requiring
multiple output high voltage current sourcing and sinking capa-
bilities such as driving plasma panels, vacuum fluorescent, or
large matrix LCD displays.
These devices consist of a 32-bit shift register, 32 latches, and
control logic to enable outputs. Q1 is connected to the first stage
of the shift register through the Output Enable logic. Data is
shifted through the shift register on the low to high transition of
the clock. The HV54 shifts in the counterclockwise direction
when viewed from the top of the package and the HV53 shifts in
the clockwise direction. A data output buffer is provided for
cascading devices. This output reflects the current status of the
last bit of the shift register (32). Operation of the shift register is
not affected by the LE (latch enable) or the OE (output enable)
inputs. Transfer of data from the shift register to the latch occurs
when the LE input is high. The data in the latch is retained when
LE is low.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and s1pecifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

1 page




HV5408X pdf
Pin Configuration
HV53
44 Pin J-Lead Package
Pin Function
1 HVOUT 17
2 HVOUT 16
3 HVOUT 15
4 HVOUT 14
5 HVOUT 13
6 HVOUT 12
7 HVOUT 11
8 HVOUT 10
9 HVOUT 9
10 HVOUT 8
11 HVOUT 7
12 HVOUT 6
13 HVOUT 5
14 HVOUT 4
15 HVOUT 3
16 HVOUT 2
17 HVOUT 1
18 Data Out
19 N/C
20 N/C
21 N/C
22 Clock
Pin Function
23 GND
24 VPP
25 VDD
26 Latch Enable
27 Data In
28 Output Enable
29 N/C
30 HVOUT 32
31 HVOUT 31
32 HVOUT 30
33 HVOUT 29
34 HVOUT 28
35 HVOUT 27
36 HVOUT 26
37 HVOUT 25
38 HVOUT 24
39 HVOUT 23
40 HVOUT 22
41 HVOUT 21
42 HVOUT 20
43 HVOUT 19
44 HVOUT 18
HV54
44 Pin J-Lead Package
Pin Function
1 HVOUT16
2 HVOUT17
3 HVOUT18
4 HVOUT19
5 HVOUT20
6 HVOUT21
7 HVOUT22
8 HVOUT23
9 HVOUT24
10 HVOUT25
11 HVOUT26
12 HVOUT27
13 HVOUT28
14 HVOUT29
15 HVOUT30
16 HVOUT31
17 HVOUT32
18 Data Out
19 N/C
20 N/C
21 N/C
22 Clock
Pin Function
23 GND
24 VPP
25 VDD
26 Latch Enable
27 Data In
28 Output Enable
29 N/C
30 HVOUT1
31 HVOUT2
32 HVOUT3
33 HVOUT4
34 HVOUT5
35 HVOUT6
36 HVOUT7
37 HVOUT8
38 HVOUT9
39 HVOUT10
40 HVOUT11
41 HVOUT12
42 HVOUT13
43 HVOUT14
44 HVOUT15
Package Outline
HV5308/HV5408
39 38 37 36 35 34 33 32 31 30 29
40 28
41 27
42 26
43 25
44 24
1 23
2 22
3 21
4 20
5 19
6 18
7 8 9 10 11 12 13 14 15 16 17
top view
44-pin J-Lead Package
5

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