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HV3418 の電気的特性と機能

HV3418のメーカーはSupertex Incです、この部品の機能は「64-Channel Serial to Parallel Converter」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV3418
部品説明 64-Channel Serial to Parallel Converter
メーカ Supertex Inc
ロゴ Supertex  Inc ロゴ 




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HV3418 Datasheet, HV3418 PDF,ピン配置, 機能
Supertex inc.
HV3418
64-Channel Serial to Parallel Converter
With High Voltage
Push-Pull Outputs
Features
►Processed with HVCMOS® technology
►Output voltages to 180V
►Low power level shifting
►Shift register speed:
6.0MHz @ VDD = 5.0V
12MHz @ VDD = 12V
►Latched data outputs
►Output polarity and blanking
►CMOS compatible inputs
►Forward and reverse shifting options
General Description
The HV3418 is a low voltage serial to high voltage parallel
converter with push-pull outputs. This device has been designed
for use as a printer driver for inkjet applications. It can also be
used in any application requiring multiple output, high voltage,
low current sourcing and sinking capabilities.
The device consists of a 64-bit shift register, 64 latches, and
control logic to perform the polarity select and blanking of the
outputs. A DIR pin controls the direction of data shift through
the device. With DIR grounded, DIOA is Data-In and DIOB is
Data-Out; data is shifted from HVOUT64 to HVOUT1. When DIR
is at logic high, DIOB is Data-In and DIOA is Data-Out: data is
then shifted from HVOUT1 to HVOUT64. Data is shifted through
the shift register on the low to high transition of the clock. Data
output buffers are provided for cascading devices. Operation
of the shift register is not affected by the LE (latch enable), BL
(blanking), or the POL(polarity) inputs. Transfer of data from the
shift register to the latch occurs when the LE (latch enable) is
high. The data in the latch is stored during LE transition from
high to low.
Functional Block Diagram
POL
BL
LE
DIOA
CLK
64 bit
DIR
Static Shift
Register
64 Latches
DIOB
VPP
HVOUT1
HVOUT2
60 Additional
Outputs
HVOUT63
HVOUT64
Doc.# DSFP-HV3418
C071813
Supertex inc.
www.supertex.com

1 Page





HV3418 pdf, ピン配列
HV3418
DC Electrical Characteristics (Over recommended operating conditions unless otherwise noted)
Sym Parameter
Min Max Units Conditions
IDD VDD supply current
IDDQ Quiescent VDD supply current
IPP High voltage supply current
IIH High-level logic input current
IIL Low-level logic input current
VOH High level output
HVOUT
DOUT
VOL Low level output
HVOUT
DOUT
VOC HVOUT clamp voltage
-
-
-
-
-
-
155
VDD - 1.0V
-
-
-
-
25
200
0.50
0.50
10
-10
-
-
25
1.0
VDD + 1.5
-1.5
mA fCLK = 12MHz, fDATA = 12MHz, LE = low
µA All VIN = 0 or VDD
mA VPP = 180V. All outputs high.
VPP = 180V. All outputs low.
µA VIH = VDD
µA VIL = 0V
V
VPP = 180V, IHVOUT = -5.0mA,
IDOUT = -100µA
V
VPP = 180V, IHVOUT = +5.0mA,
IDOUT = +100µA
V IOL = +5.0mA
IOL = -5.0mA
AC Electrical Characteristics (For VDD = 12V. Values in parentheses are for VDD = 5.0V, VPP = 180V, TA = 25°C)
Sym Parameter
Min Max Units Conditions
fCLK Clock frequency
- 12 (6.0) MHz ---
tW Clock width high or low
40 (83) - ns ---
tSU Data set-up time before clock rises 25 (35) - ns ---
tH Data hold time after clock rises 10 (30) - ns ---
tWLE LE pulse width
62 (80) - ns ---
tDLE Delay time clock to LE high to low
25 (35)
-
ns ---
tSLE LE set-up time before clock rises
30 (40)
-
ns ---
tON, tOFF Time from LE to HVOUT
-
1.0 (1.5)
µs CL = 20pF
tDHL Delay time clock to data high to low
-
50 (110)
ns CL = 20pF
tDLH Delay time clock to data low to high
-
75 (160)
ns CL = 20pF
tR, tF All logic inputs
- 5.0 ns ---
Notes:
1. Shift register speed can be as low as DC as long as data set-up and hold time meet the spec.
2. AC characteristics are guaranteed only under VDD = 12V and VDD = 5.0V.
Doc.# DSFP-HV3418
C071813
Supertex inc.
3 www.supertex.com


3Pages


HV3418 電子部品, 半導体
Pin Description
Pin #
Function
1 HVOUT41/24
2 HVOUT42/23
3 HVOUT43/22
4 HVOUT44/21
5 HVOUT45/20
6 HVOUT46/19
7 HVOUT47/18
8 HVOUT48/17
9 HVOUT49/16
10 HVOUT50/15
11 HVOUT51/14
12 HVOUT52/13
13 HVOUT53/12
14 HVOUT54/11
15 HVOUT55/10
16 HVOUT56/9
17 HVOUT57/8
18 HVOUT58/7
19 HVOUT59/6
20 HVOUT60/5
21 HVOUT61/4
22 HVOUT62/3
23 HVOUT63/2
24 HVOUT64/1
25 VPP
26 DIOA
27 N/C
Notes:
Pin designation for DIR = H/L
Example:
for
for
DIR
DIR
=
=
H,
L,
Pin
Pin
1
1
is
is
HHVVOOUUTT2441
Pin #
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
Function
N/C
BL
POL
VDD
DIR
LGND
OGND
N/C
N/C
CLK
LE
DIOB
VPP
HVOUT1/64
HVOUT2/63
HVOUT3/62
HVOUT4/61
HVOUT5/60
HVOUT6/59
HVOUT7/58
HVOUT8/57
HVOUT9/56
HVOUT10/55
HVOUT11/54
HVOUT12/53
HVOUT13/52
HVOUT14/51
Pin #
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
HV3418
Function
HVOUT15/50
HVOUT16/49
HVOUT17/48
HVOUT18/47
HVOUT19/46
HVOUT20/45
HVOUT21/44
HVOUT22/43
HVOUT23/42
HVOUT24/41
HVOUT25/40
HVOUT26/39
HVOUT27/38
HVOUT28/37
HVOUT29/36
HVOUT30/35
HVOUT31/34
HVOUT32/33
HVOUT33/32
HVOUT34/31
HVOUT35/30
HVOUT36/29
HVOUT37/28
HVOUT38/27
HVOUT39/26
HVOUT40/25
Doc.# DSFP-HV3418
C071813
Supertex inc.
6 www.supertex.com

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
HV3418

64-Channel Serial to Parallel Converter

Supertex  Inc
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HV3418DG

64-Channel Serial to Parallel Converter

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HV3418PG

64-Channel Serial to Parallel Converter

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HV3418PG-G

64-Channel Serial to Parallel Converter

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