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HV302NG の電気的特性と機能

HV302NGのメーカーはSupertex Incです、この部品の機能は「Sequencing Hotswap Controllers」です。


製品の詳細 ( Datasheet PDF )

部品番号 HV302NG
部品説明 Sequencing Hotswap Controllers
メーカ Supertex Inc
ロゴ Supertex  Inc ロゴ 




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HV302NG Datasheet, HV302NG PDF,ピン配置, 機能
HV302
HV312
__________________________________________________________________________________________________________________
Initial Release
Sequencing Hotswap Controllers
(Negative Supply Rail)
Features
General Description
-10V to 90V or +10V to +90V Operation
Four PWRGD Flags with Programmable Delays
Integrated “normally-on” Gate Clamp eliminates components
UV/OV Lock Out & Power-On-Reset (POR) for Debouncing
Sense resistor programmed Circuit Breaker & Servo Limit
Programmable Circuit Breaker Delay
Inrush control using either: Servo or Feedback Capacitor
Feedback to RAMP pin saves gate protection components
100ms Start Up Timeout Protection for Output Overload
Programmable Inrush Current di/dt Control
Programmable Auto-Retry (tens of seconds if desired)
Auto-Retry or Latched Operation
Application solution for input voltage step (diode “ORing”)
Enable through Open Drain interface to UV or OV
Low Power, 0.6mA Active Mode, 0.4mA Sleep Mode
Small SOIC-14 Package
Applications
-48V Telecom and Networking
-24V Cellular and Fixed Wireless Systems
-24V PBX Systems
Power Over LAN (IEEE802.3)
Distributed Power Systems
Power Supply Control
+48V Servers and SANs
Hotswap Control of Diode ORed Multiple Power Sources
Cooling Fan Systems
The HV302 and HV312 Hotswap Controllers perform current
limiting, circuit breaker protection, over and under voltage
detection power management functions during insertion of cards or
modules into live backplanes and connectors. They may be used
in systems where active control is implemented in the negative
lead of supplies ranging from -10V to -90V or +10V to +90V.
During initial power application the external pass device is held off
by a “normally-on” circuit that clamps its gate low. Thereafter
UV/OV and power-on-reset work together to suppress gate turn on
due to contact bounce. When stable connection has been
established for the duration of a programmed time delay, the
inrush current is controlled and limited to a programmed level
using one of two possible methods; servo mode or drain to ramp
feedback capacitor mode. When charging of the load capacitor
is completed, the open drain PWRGD-A flag is asserted. Open
drain PWRGD-B, PWRGD-C and PWRGD-D flags are asserted
sequentially after the expiration of their respective programmed
time delays. Thereafter it transitions to a low power sleep mode
and continues to monitor current and input voltage. If full charging
of the load capacitor is not achieved within 100ms or the circuit
breaker is tripped at any time, the external pass device is turned
off and all four PWRGD flags are reset to the inactive state.
Thereafter a programmable auto-retry timer will hold the pass
device off to allow it to cool before resetting and initiating auto-
retry. The auto-retry can be disabled using a single resistor if
desired.
Typical Application Circuit and Waveforms
GND
14
VDD
R1
487k
R2
6.81k
-48V
R3
9.76k
6 UV
5 OV
TB
11
TC
12
________
PWRGD-D / PWRGD-D
________
PWRGD-C /PWRGD-C
________
PWRGD-B / PWRGD-B
________
PWRGD-A / PWRGD-A
1
2
3
4
HV302 / HV312
Cload
TD RAMP VEE SENSE GATE
13 10
7
8
9
100uF
RTB
RTC
RTD
C1
10nF
R4
0.0125
NOTES:
1. Under Voltage Shutdown (UV) set to 35V.
2. Over Voltage Shutdown (OV) set to 65V.
3. Current Limit set to -1A.
4. Circuit Breaker set to 8A.
C2
0.75nF
Q1
IRF530
___
EN / EN
DC/DC PWM
CONVERTER
-12V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+12V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+5V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+3.3V
COM
1 Rev. D
04/17/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 Fax: (408) 222-4895 www.supertex.com

1 Page





HV302NG pdf, ピン配列
Power Good Outputs (Referenced to VEE pin)
VPWRGD-x(hi) Power Good Pin Breakdown Voltage
VPWRGD-x(lo) Power Good Pin Output Low Voltage
IPWRGD-x(lk) Maximum Leakage Current
90
0.5 0.8
<1.0 10
V PWRGD-x = HI Z
V IPWRGD = 1mA, PWRGD-x = LOW
µA VPWRGD = 90V, PWRGD-x = HI Z
Dynamic Characteristics
tGATEHLOV OV Comparator Transition
tGATEHLUV UV Comparator Transition
500 ns
500 ns
Note 1: This timing depends on the threshold voltage of the external N-Channel MOSFET. The higher its threshold is, the longer this timing.
Note 2: This voltage depends on the characteristics of the external N-Channel MOSFET. Vto = 3V for an IRF530.
*IRF530 is a registered trademark of International Rectifier.
Pinout
PWRGD-D (HV302)
________
PWRGD-D (HV312)
PWRGD-C (HV302)
________
PWRGD-C (HV312)
PWRGD-B (HV302)
________
PWRGD-B (HV312)
PWRGD-A (HV302)
________
PWRGD-A (HV312)
1
2
3
4
OV 5
UV 6
VEE 7
14 VDD
13 TD
12 TC
11 TB
10 RAMP
9 GATE
8 SENSE
PWRGD Logic
Model
HV302
HV312
Condition
INACTIVE (Not Ready)
ACTIVE (Ready)
INACTIVE (Not Ready)
ACTIVE (Ready)
PWRGD-A/B/C/D
0 VEE
1 HI Z
1 HI Z
0 VEE
Pin Description
PWRGD-D – This Power Good Output Pin is held inactive on initial
power application and goes active a programmed time delay after
PWRGD-C goes active.
PWRGD-C – This Power Good Output Pin is held inactive on initial
power application and goes active a programmed time delay after
PWRGD-B goes active.
PWRGD-B – This Power Good Output Pin is held inactive on initial
power application and goes active a programmed time delay after
PWRGD-A goes active.
PWRGD-A – This Power Good Output Pin is held inactive on initial
power application and goes active when the external MOSFET is
fully turned on.
OV – This Over Voltage (OV) sense pin, when raised above its
high threshold will immediately cause the GATE pin to be pulled
low. The GATE pin will remain low until the voltage on this pin falls
below the low threshold limit, initiating a new start-up cycle.
UV – This Under Voltage (UV) sense pin, when below its low
threshold limit will immediately cause the GATE pin to be pulled
low. The GATE pin will remain low until the voltage on this pin
rises above the high threshold limit, initiating a new start-up cycle.
VEE – This pin is the negative terminal of the power supply input to
the circuit.
VDD This pin is the positive terminal of the power supply input to
the circuit.
TD – The resistor connected from this pin to VEE pin sets the time
delay from PWRGD-C going active to PWRGD-D going active.
TC – The resistor connected from this pin to VEE pin sets the time
delay from PWRGD-B going active to PWRGD-C going active.
TB – The resistor connected from this pin to VEE pin sets the time
delay from PWRGD-A going active to PWRGD-B going active.
RAMP – This pin provides a current output so that a timing ramp
voltage is generated when a capacitor is connected.
GATE – This is the Gate Driver Output for the external N-Channel
MOSFET.
SENSE – The current sense resistor connected from this pin to VEE
Pin programs the servo control current limit and the circuit breaker
trip limit.
3 Rev. D
04/17/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 Fax: (408) 222-4895 www.supertex.com


3Pages


HV302NG 電子部品, 半導体
Design Information
Programming Under and Over Voltage Shut Down
The UV and OV pins are connected to comparators with nominal
1.21V thresholds and 100mV of hysteresis (1.21V ± 50mV). They
are used to detect under voltage and over voltage conditions at the
input to the circuit. Whenever the OV pin rises above its high
threshold (1.26V) or the UV pin falls below its low threshold
(1.16V) the GATE voltage is immediately pulled low, the PWRGD
pin changes to its inactive state and the external capacitor
connected to the RAMP pin is discharged.
Calculations can be based on either the desired input voltage
operating limits or the input voltage shutdown limits. In the
following equations the shutdown limits are assumed.
The under voltage and over voltage shut down thresholds can be
programmed by means of the three resistor divider formed by R1,
R2 and R3. Since the input currents on the UV and OV pins are
negligible the resistor values may be calculated as follows:
UVOFF
=
VUVL
= 1.16
=
VEEUV(off)
×
R2 + R3
R1 + R2 + R3
OVOFF
=
VOVH
= 1.26
=
VEEOV(off)
R3
× R1 + R2 + R3
Where VEEUV(off)and VEEOV(off)are Under & Over Voltage Shut
Down Threshold points.
If we select a divider current of 100µA at a nominal operating input
voltage of 50 Volts then
R1 +
R2
+
R3
=
50V
100uA
= 500k
From the second equation for an OV shut down threshold of 65V
the value of R3 may be calculated.
OVOFF
= 1.26
=
65 × R3
500k
R3 =
1.26 × 500K
65
= 9.69k
The closest 1% value is 9.76k
From the first equation for a UV shut down threshold of 35V the
value of R2 can be calculated.
UVOFF
=
1.16
=
35 × (R2 + R3)
500K
R2
=
1.16
× 500k
35
9.76k
=
6.81k
The closest 1% value is 6.81k
Then
R1 = 500KR2 R3 = 483k
The closest 1% value is 487k
HV302 / HV312
Under Voltage/Over Voltage Operation
From the calculated resistor values the OV and UV start up
threshold voltages can be calculated as follows:
UVON
=
VUVH
= 1.26
=
VEEUV(on)
×
R2 + R3
R1 + R2 + R3
OVON
= VOVL
= 1.16
=
VEEOV(on)
×
R1
+
R3
R2
+
R3
Where VEEUV(on)and VEEOV(on)are Under & Over Voltage Start
Up Threshold points.
Then
VEEUV(on)
=
1.26
×
R1 + R2 + R3
R2 + R3
VEEUV(on)
=
1.26
×
487k+ 6.81k+ 9.76k
6.81k+ 9.76k
= 38.29V
And
VEEOV(on)
=
1.16
×
R1
+
R2
R3
+
R3
VEEOV(on)
=
1.16
×
487k
+
6.81k+ 9.76k
9.76k
= 59.85V
Therefore, the circuit will start when the input supply voltage is in
the range of 38.29V to 59.85V.
6 Rev. D
04/17/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 Fax: (408) 222-4895 www.supertex.com

6 Page



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部品番号部品説明メーカ
HV302NG

Sequencing Hotswap Controllers

Supertex  Inc
Supertex Inc


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