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PDF HV300LG Data sheet ( Hoja de datos )
| Número de pieza | HV300LG | |
| Descripción | HV300 Hot Swap Demo Board | |
| Fabricantes | Supertex Inc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HV300LG (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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HV300/HV310
HV300
HV310
DAevmaoilaKbilte
Hotswap, Inrush Current Limiter Controllers
(Negative Supply Rail)
Features
General Description
❏ HV300, PWRGD=Active HIGH
❏ HV310, PWRGD=Active LOW
❏ -10V to -90V Input Voltage Range
❏ Few External Components
❏ 0.33mA Typical Standby Supply Current
❏ Programmable Over/Under Voltage Limits with
Hysteresis
❏ Programmable Current Limit
❏ Active control during all phases of start-up
❏ Programmable timing
❏ 8 Lead SOIC
Applications
❏ Central Office Switching
❏ Servers
❏ POTS Line Cards
❏ ISDN Line Cards
❏ xDSL Line Cards
❏ PBX Systems
❏ Powered Ethernet for VoIP
❏ Distributed Power Systems
❏ Negative Power Supply Control
❏ Antenna and Fixed Wireless Systems
Ordering Information
VEE
Min Max
-90V
-90V
-10V
-10V
Package Options
Power Good
Signal
8 Pin SOIC
Active HIGH HV300LG
Active LOW HV310LG
The Supertex HV300 (and HV310), Hotswap Controller, Negative
Supply control power supply connection during insertion of
cards or modules into live backplanes. They may be used in
traditional ‘negative 48V’ powered systems or for higher voltage
busses up to negative 90V.
Operation during the initial power up prevents turn-on glitches,
and after complete charging of load capacitors (typically found
in filters at the input of DC-DC converters) the HV300 (and
HV310) issues a power good signal. This signal is typically
used to enable the DC-DC converter.
The only difference between the HV300 and the HV310 is the
polarity of the PWRGD signal line to accommodate different
DC-DC converter models. Once PWRGD signal has been
established the device sleeps in a low power state, important
for large systems with many individual hotswap cards or
modules.
An external power MOSFET is required as the pass element,
plus a ramp capacitor, and resistors to establish current limiting
and over and under voltage lockouts. There is no need for
additional external snubber components.
Features are programmable over voltage and under voltage
detection of the input voltage which locks out the load connection
if the bus (input) voltage is out of range. An internal voltage
regulator creates a stable reference, and maintains accurate
gate drive voltage. The unique control loop scheme provides
full current control and limiting during start up.
Theory of Operation
Initially the external N-channel MOSFET is held off by the gate
signal, preventing an input glitch. After a delay (while internal
circuits are activated) the inrush current to the load is limited by
the gate control output. The current may ramp up and limit at
a maximum value programmed by an external resistor. Initial
time delay, to allow for contact bounce, and charging operation
is determined by the single external ramp capacitor connected
to the RAMP pin. When the load capacitor is fully charged, the
controller emerges from current limit mode, an additional time
delay occurs before the external N-channel MOSFET pass
transistor is switched to full conduction, and the PWRGD
output signal is activated. The controller will then transition to
a low power standby mode.
The HV300LG PWRGD is active high (open drain), while the
HV310LG PWRGD is active low (VEE).
08/26/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1 page  
Functional Description
Insertion Into Hot Backplanes
Telecom, Data Network and some Computer applications require
the ability to insert and remove circuit cards from systems
without powering down the entire system. All circuit cards have
some filter capacitance on the power rails, which is especially
true in circuit cards or network terminal equipment utilizing
distributed power systems. The insertion can result in high
inrush currents that can cause damage to connector and circuit
cards and may result in unacceptable disturbances on the
system backplane power rails.
The HV300/HV310 was designed to allow the insertion of these
circuit cards or connection of terminal equipment by eliminating
these inrush currents and powering up these circuits in a
controlled manner after full connector insertion has been
achieved. The HV300/HV310 is intended to provide this function
on a negative supply rail in the range of -10 to -90 Volts.
Waveforms
Drain
50V/div
VIN
50V/div
Gate
5.00V/div
Iinrush
500mA/div
5.00ms/div
HV300/HV310
Assuming the above conditions are satisfied and while continuing
to hold the PWRGD output inactive and the external MOSFET
GATE voltage low, the current source feeding the RAMP pin is
turned on. The external capacitor connected to it begins to
charge, thus starting an initial time delay determined by the
value of the capacitor. If an interruption of the input power
occurs during this time (i.e. caused by contact bounce) or the
OV or UV limits are exceeded, an immediate reset occurs and
the external capacitor connected to the RAMP pin is discharged.
When the voltage on the RAMP pin reaches an internally set
voltage limit, the gate drive circuitry begins to turn on the
external MOSFET; allowing the current to softly rise over a
period of a few hundred micro-seconds to the current limit set
point. While the circuit is limiting current, the voltage on the
RAMP pin will be fixed.
Depending on the value of the load capacitance and the
programmed current limit, charging may continue for some
time. The magnitude of the current limit is programmed by
comparing a voltage developed by a sense resistor connected
between the VEE and SENSE pins to 50mV (Typical). Once the
load capacitor has been charged, the current will drop which
will cause the ramp voltage to continue rising; providing yet
another programmed delay.
When the ramp voltage is within 1.2V of the internally regulated
voltage, the controller will force the GATE full on and will
activate the PWRGD pin and the circuit will transition to a low
power standby mode. The PWRGD pin is often used as an
enable for downstream DC/DC converter loads.
At any time during the start up cycle or thereafter, crossing the
UV and OV limits (including hysteresis) will cause an immediate
reset of all internal circuitry. Thereafter the start up process will
begin again.
Operation
On initial power application an internal regulator seeks to provide
10 Volts for the internal IC circuitry. Until the proper internal
voltage is achieved all circuits are held reset, the open drain
PWRGD signal is inactive to inhibit the start of any load circuitry
and the gate to source voltage of the external N-channel
MOSFET is held low. Once the internal under voltage lock out
(UVLO) has been satisfied, the circuit checks the input supply
voltage under voltage (UV) and over voltage (OV) sense circuits
to ensure that the input voltage is within acceptable programmed
limits. These limits are determined by the selected values of
resistors R1, R2 and R3, which form a voltage divider.
5
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet HV300LG.PDF ] | |
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