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PDF HV214 Data sheet ( Hoja de datos )

Número de pieza HV214
Descripción High Voltage Analog Switch
Fabricantes Supertex Inc 
Logotipo Supertex  Inc Logotipo



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No Preview Available ! HV214 Hoja de datos, Descripción, Manual

Supertex inc.
HV214
250V Low Charge Injection,
8-Channel, High Voltage Analog Switch
Features
►HVCMOS® technology for high performance
►Very low quiescent power dissipation (-10µA)
►Low parasitic capacitances
►DC to 50MHz small signal frequency response
►-60dB typical output off isolation at 5.0MHz
►CMOS logic circuitry for low power
►Excellent noise immunity
►On-chip shift register, latch and clear logic circuitry
►Flexible high voltage supplies
►Surface mount packages
Applications
►Medical ultrasound imaging
►Non-destructive evaluation
►Inkjet printer heads
►Optical MEMS modules
General Description
The Supertex HV214 is a low charge injection, 8-channel, high
voltage, analog switch integrated circuit (IC) intended for use in
applications requiring high voltage switching controlled by low
voltage control signals, such as medical ultrasound imaging,
piezoelectric transducer drivers, inkjet printer heads and optical
MEMS modules.
Input data is shifted into an 8-bit shift register that can then be
retained in an 8-bit latch. To reduce any possible clock feedthrough
noise, the latch enable bar should be left high until all bits are
clocked in. Data are clocked in during the rising edge of the clock.
Using HVCMOS® technology, this device combines high voltage
bilateral DMOS switches and low power CMOS logic to provide
efficient control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-210V, +125V/-125V, +210V/-40V.
Block Diagram
DIN
CLK
DOUT
Doc.# DSFP-HV214
C070713
8-Bit
Shift
Register
Level Output
Latches Shifters Switches
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
D
LE
CL
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
VDD
LE CL
VNN VPP
Supertex inc.
www.supertex.com

1 page




HV214 pdf
HV214
Truth Table
D0
Data in 8-Bit Shift Register
D1 D2 D3 D4 D5 D6
D7
LE
CL
SW0 SW1
Output Switch State
SW2 SW3 SW4 SW5
SW6 SW7
L L L OFF
H L L ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
LL
ON
L LL
OFF
H LL
ON
L LL
OFF
H LL
ON
L LL
OFF
H LL
ON
LL L
OFF
HL L
ON
XXXXXXXX H L
Hold Previous State
X X X X X X X X X H OFF OFF OFF OFF OFF OFF OFF OFF
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L→H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the
latch.
4.
5.
SDhOUifTt
is high when data in the
register clocking has no
shift register
effect on the
7 is high.
switch states
if
LE
is
H.
6. The clear input overrides all other inputs.
Logic Timing Waveforms
DN+1
DN
DATA
IN
50%
50%
DN-1
Doc.# DSFP-HV214
C070713
LE
CLOCK
DATA
OUT
VOUT
(typ)
OFF
ON
CLR
50%
50%
tSU
50%
tWLE
tSD
50%
th
tDO
50%
tOFF
90%
50%
tWCL
5
50%
tON
10%
Supertex inc.
www.supertex.com

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