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Número de pieza | HUF76619D3S | |
Descripción | 18A/ 100V/ 0.087 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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No Preview Available ! Data Sheet
HUF76619D3, HUF76619D3S
December 2001
18A, 100V, 0.087 Ohm, N-Channel, Logic
Level UltraFET® Power MOSFET
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
HUF76619D3
DRAIN
(FLANGE)
GATE
SOURCE
HUF76619D3S
Symbol
D
G
S
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.085Ω, VGS = 10V
- rDS(ON) = 0.087Ω, VGS = 5V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.Fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs RGS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76619D3
TO-251AA
76619D
HUF76619D3S
TO-252AA
76619D
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-252AA variant in tape and reel, e.g., HUF76619D3ST.
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
HUF76619D3, HUF76619D3S
UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous
Continuous
Continuous
(TC
(TC
(TC
=
=
=
1220550ooCCoC,, ,VVVGGGSSS===1505VVV) ))
.........
(Figure 2)
........
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ID
ID
ID
Continuous (TC = 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
100
100
±16
18
18
12
12
Figure 4
Figures 6, 17, 18
V
V
V
A
A
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
..
Operating and Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 150oC.
75
0.5
-55 to 175
300
260
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF76619D3, HUF76619D3S Rev. B
1 page HUF76619D3, HUF76619D3S
Typical Performance Curves (Continued)
1.2 1.2
VGS = VDS, ID = 250µA
ID = 250µA
0.9 1.1
0.6 1.0
0.3
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
2000
1000
CISS = CGS + CGD
COSS ≅ CDS + CGD
100
10
0.1
VGS = 0V, f = 1MHz
CRSS = CGD
1.0 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
200
VGS = 4.5V, VDD = 50V, ID = 12A
160
tr
120 td(OFF)
80 tf
40
0
0
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
0.9
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
VDD = 50V
8
6
4 WAVEFORMS IN
DESCENDING ORDER:
2 ID = 18A
ID = 12A
ID = 6A
0
0 5 10 15 20 25
Qg, GATE CHARGE (nC)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
200
VGS = 10V, VDD = 50V, ID = 18A
160
td(OFF)
120
80
40
0
0
tf
tr
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
©2001 Fairchild Semiconductor Corporation
HUF76619D3, HUF76619D3S Rev. B
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet HUF76619D3S.PDF ] |
Número de pieza | Descripción | Fabricantes |
HUF76619D3 | 18A/ 100V/ 0.087 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Fairchild Semiconductor |
HUF76619D3 | 18A/ 100V/ 0.087 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Intersil Corporation |
HUF76619D3S | 18A/ 100V/ 0.087 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Fairchild Semiconductor |
HUF76619D3S | 18A/ 100V/ 0.087 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFET | Intersil Corporation |
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