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HUF76145S3S の電気的特性と機能

HUF76145S3SのメーカーはIntersil Corporationです、この部品の機能は「75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs」です。


製品の詳細 ( Datasheet PDF )

部品番号 HUF76145S3S
部品説明 75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HUF76145S3S Datasheet, HUF76145S3S PDF,ピン配置, 機能
Data Sheet
HUF76145P3, HUF76145S3S
September 1999 File Number 4401.7
75A, 30V, 0.0045 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA76145.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76145P3
TO-220AB
76145P
HUF76145S3S
TO-263AB
76145S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF76145S3ST.
Packaging
DRAIN
(FLANGE)
JEDEC TO-220AB
SOURCE
DRAIN
GATE
Features
• Logic Level Gate Drive
• 75A, 30V
• Ultra Low On-Resistance, rDS(ON) = 0.0045
• Temperature Compensating PSPICE™ Model
• Temperature Compensating SABER Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
6-178
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a Trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 Page





HUF76145S3S pdf, ピン配列
HUF76145P3, HUF76145S3S
Electrical Specifications TA = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Turn-Off Time
tOFF
GATE CHARGE SPECIFICATIONS
VDD = 15V, ID 75A,
RL = 0.20, VGS = 10V,
RGS = 2.2
(Figures 16, 20, 21)
- - 110 ns
- 16 - ns
- 57 - ns
- 53 - ns
- 38 - ns
- - 135 ns
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Qg(TOT)
Qg(5)
Qg(TH)
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 15V,
ID 75A,
RL = 0.20
Ig(REF) = 1.0mA
(Figures 14, 19, 20)
-
-
-
130 156
73 88
4.65 5.6
nC
nC
nC
Qgs
- 12.30 -
nC
Qgd
- 40.00 -
nC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
COSS
CRSS
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 13)
- 4900 -
- 2520 -
- 560 -
pF
pF
pF
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
VSD
trr
QRR
ISD = 75A
ISD = 75A, dISD/dt = 100A/µs
ISD = 75A, dISD/dt = 100A/µs
Typical Performance Curves
MIN TYP MAX UNITS
- - 1.25 V
- - 115 ns
- - 255 nC
1.2
1.0
0.8
0.6
0.4
0.2
0
0 25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
80
VGS=10V
60
VGS=4.5V
40
20
0
25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
6-180


3Pages


HUF76145S3S 電子部品, 半導体
HUF76145P3, HUF76145S3S
Typical Performance Curves (Continued)
8000
6000
4000
2000
0
0
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
CISS
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 75A
ID = 50A
VDD = 15V
ID = 25A
0
0 40 80 120 160
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
1200
1000
VGS = 4.5V, VDD = 15V, ID = 75A, RL= 0.20
tr
800 tf
td(OFF
600
400
200
0
0
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE ()
50
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
1000
800
600
400
VGS = 10V, VDD = 15V, ID = 75A, RL= 0.20
td(OFF)
tf
tr
200
0
0
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE ()
50
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
6-183

6 Page



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部品番号部品説明メーカ
HUF76145S3S

75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs

Fairchild Semiconductor
Fairchild Semiconductor
HUF76145S3S

75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs

Intersil Corporation
Intersil Corporation


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