|
|
HUF76145S3SのメーカーはFairchild Semiconductorです、この部品の機能は「75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs」です。 |
部品番号 | HUF76145S3S |
| |
部品説明 | 75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとHUF76145S3Sダウンロード(pdfファイル)リンクがあります。 Total 11 pages
Data Sheet
HUF76145P3, HUF76145S3S
December 2001
75A, 30V, 0.0045 Ohm, N-Channel, Logic
Level UltraFET Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers,
low-voltage bus switches, and power management in
portable and battery-operated products.
Formerly developmental type TA76145.
Ordering Information
PART NUMBER
HUF76145P3
PACKAGE
TO-220AB
BRAND
76145P
HUF76145S3S
TO-263AB
76145S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF76145S3ST.
Symbol
D
G
S
Features
• Logic Level Gate Drive
• 75A, 30V
• Ultra Low On-Resistance, rDS(ON) = 0.0045Ω
• Temperature Compensating PSPICE® Model
• Temperature Compensating SABER™ Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Packaging
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
©2001 Fairchild Semiconductor Corporation
HUF76145P3, HUF76145S3S Rev. B
1 Page HUF76145P3, HUF76145S3S
Electrical Specifications TA = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
tf
Turn-Off Time
tOFF
GATE CHARGE SPECIFICATIONS
VDD = 15V, ID ≅ 75A,
RL = 0.20Ω, VGS = 10V,
RGS = 2.2Ω
(Figure 16)
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Qg(TOT)
Qg(5)
Qg(TH)
Qgs
Qgd
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 15V,
ID ≅ 75A,
RL = 0.20Ω
Ig(REF) = 1.0mA
(Figure 14)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
COSS
CRSS
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 13)
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
VSD
trr
QRR
ISD = 75A
ISD = 75A, dISD/dt = 100A/µs
ISD = 75A, dISD/dt = 100A/µs
Typical Performance Curves
MIN TYP MAX UNITS
- - 110 ns
- 16 - ns
- 57 - ns
- 53 - ns
- 38 - ns
- - 135 ns
- 130 156 nC
- 73 88 nC
-
4.65 5.6
nC
- 12.30 -
nC
- 40.00 -
nC
- 4900 -
- 2520 -
- 560 -
pF
pF
pF
MIN TYP MAX UNITS
- - 1.25 V
- - 115 ns
- - 255 nC
1.2
1.0
0.8
0.6
0.4
0.2
0
0 25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
80
VGS = 10V
60
VGS = 4.5V
40
20
0
25 50 75 100 125 150 175
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUF76145P3, HUF76145S3S Rev. B
3Pages HUF76145P3, HUF76145S3S
Typical Performance Curves (Continued)
8000
6000
4000
2000
0
0
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
CISS
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 75A
ID = 50A
VDD = 15V
ID = 25A
0
0 40 80 120 160
Qg, GATE CHARGE (nC)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
1200
1000
VGS = 4.5V, VDD = 15V, ID = 75A, RL= 0.20Ω
tr
800 tf
td(OFF)
600
400
200
0
0
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE (Ω)
50
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
Test Circuits and Waveforms
1000
800
VGS = 10V, VDD = 15V, ID = 75A, RL= 0.20Ω
td(OFF)
600
tf
400
tr
200
td(ON)
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUF76145P3, HUF76145S3S Rev. B
6 Page | |||
ページ | 合計 : 11 ページ | ||
|
PDF ダウンロード | [ HUF76145S3S データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HUF76145S3S | 75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs | Fairchild Semiconductor |
HUF76145S3S | 75A/ 30V/ 0.0045 Ohm/ N-Channel/ Logic Level UltraFET Power MOSFETs | Intersil Corporation |