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PDF HUF76105DK8 Data sheet ( Hoja de datos )

Número de pieza HUF76105DK8
Descripción 5A/ 30V/ 0.050 Ohm/ Dual N-Channel/ Logic Level UltraFET Power MOSFET
Fabricantes Intersil Corporation　
Logotipo Intersil Corporation Logotipo



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TM
Data Sheet
HUF76105DK8
June 2000
File Number 4380.6
5A, 30V, 0.050 Ohm, Dual N-Channel,
Logic Level UltraFET Power MOSFET
This N-Channel power MOSFET is
® manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery
operated products.
Formerly developmental type TA76105.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76105DK8
MS-012AA
76105DK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76105DK8T.
Features
• Logic Level Gate Drive
• 5A, 30V
• Ultra Low On-Resistance, rDS(ON) = 0.050Ω
• Temperature Compensating PSPICE® Model
• Temperature Compensating SABER© Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
S1(1)
G1(2)
D1(8)
D1(7)
S2(3)
G2(4)
D2(6)
D2(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET® is a registered trademark of Intersil Corporation.
PSPICE® is a registered trademark of MicroSim Corporation. SABER™ is a trademark of Analogy, Inc.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

1 page




HUF76105DK8 pdf
HUF76105DK8
Typical Performance Curves (Continued)
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDD = 15V
20
15
-55oC
25oC
150oC
10
5
0
01234
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
5
25
VGS = 10V
VGS = 5V
20
VGS = 4V
15
VGS = 3.5V
10
VGS = 3V
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TA = 25oC
0
012345
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 8. SATURATION CHARACTERISTICS
110
ID = 5A
90
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
70
ID = 1.4A
50
30
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
1.8 PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.6 VGS = 10V, ID = 5A
1.4
1.2
1.0
0.8
0.6
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.2
VGS = VDS, ID = 250µA
1.1
1.0
0.9
0.8
0.7
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
5
1.15
ID = 250µA
1.1
1.05
1.0
0.95
0.9
-80
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE

5 Page





HUF76105DK8 arduino
SABER Electrical Model
REV June
1998
HUF76105DK8
template huf76105 n2,n1,n3
electrical n2,n1,n3
{
var i iscl
d..model dbodymod = (is = 3.01e-13, cjo = 5.74e-10, tt = 2.88e-8, xti = 4.5, m = 0.43)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 2.55e-10, is = 1e-30, n = 10, m = 0.6)
m..model mmedmod = (type=_n, vto = 1.92, kp = 2.1, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 2.26, kp = 19, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 1.7, kp = 0.1, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.2, voff = -2)
sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -2, voff = -6.2)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.5, voff = 0.5)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = -0.5)
c.ca n12 n8 = 4.95e-10
c.cb n15 n14 = 5.15e-10
c.cin n6 n8 = 2.9e-10
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
l.ldrain n2 n5 = 1e-9
l.lgate n1 n9 = 9.2e-10
l.lsource n3 n7 = 3.2e-10
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
res.rbreak n17 n18 = 1, tc1 = 9.94e-4, tc2 = 9.84e-8
res.rdbody n71 n5 = 1.47e-2, tc1 = -1.7e-3, tc2 = 4e-5
res.rdbreak n72 n5 = 3.94e-1, tc1 = 9.94e-4, tc2 = 9.12e-7
res.rdrain n50 n16 = 9e-3, tc1 = 8e-3, tc2 = 5.3e-5
res.rgate n9 n20 = 3.39
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 9.2
res.rlsource n3 n7 = 3.2
res.rslc1 n5 n51 = 1e-6, tc1 = 1e-3, tc2 = 1e-6
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 22e-3, tc1 = 1e-3, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -1.5e-3, tc2 = 1.7e-6
res.rvthres n22 n8 = 1, tc1 = -1.87e-3, tc2 = -1.2e-6
spe.ebreak n11 n7 n17 n18 = 33.87
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/42))** 6))
}
}
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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