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PDF HUF75639S3R4851 Data sheet ( Hoja de datos )
| Número de pieza | HUF75639S3R4851 | |
| Descripción | 56A/ 115V/ 0.025 Ohm/ N-Channel UltraFET Power MOSFET | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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TM
Data Sheet
HUF75639S3R4851
April 2000
File Number 4854
56A, 115V, 0.025 Ohm, N-Channel
UltraFET Power MOSFET
This N-Channel power MOSFETs is manufactured using the
innovative UltraFET™ process. This advanced process
technology achieves the lowest possible on-resistance per
silicon area, resulting in outstanding performance. This
device is capable of withstanding high energy in the
avalanche mode and the diode exhibits very low reverse
recovery time and stored charge. It was designed for use in
applications where power efficiency is important, such as
switching regulators, switching converters, motor drivers,
relay drivers, low-voltage bus switches, and power
management in portable and battery-operated products.
Formerly developmental type TA75639.‘
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75639S3R4851 TO-262AA
R4851
NOTE: When ordering, use the entire part number.
Symbol
D
Features
• 56A, 115V
• Simulation Models
- Temperature Compensated PSPICETM and SABER©
Electrical Models
- Spice and Saber Thermal Impedance Models
- www.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Packaging
JEDEC TO-262AA
SOURCE
DRAIN
GATE
G
S
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
HUF75639S3R4851
115
115
±20
56
Figure 4
Figures 6, 14, 15
200
1.35
-55 to 175
300
260
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
PSPICE® is a registered trademark of MicroSim Corporation. | SABER™ is a trademark of Analogy, Inc.
UltraFET® is a registered trademark of Intersil Corporation.
1 page  
HUF75639S3R4851
Typical Performance Curves (Continued)
1.2
ID = 250µA
1.1
1.0
0.9
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
3000
2500
2000
1500
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
1000
500
0
0
COSS
CRSS
10 20 30 40 50
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 56A
ID = 37A
VDD = 50V
ID = 18A
0
0 10 20 30 40 50 60
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
5
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HUF75639S3R4851.PDF ] | |
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