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Número de pieza | HYB314405BJBJL-50- | |
Descripción | 1M x 4-Bit Dynamic RAM | |
Fabricantes | Siemens Semiconductor Group | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HYB314405BJBJL-50- (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
No Preview Available ! 1M x 4-Bit Dynamic RAM
(Hyper Page Mode (EDO) version)
HYB 314405BJ/BJL-50/-60/-70
Advanced Information
• 1 048 576 words by 4-bit organization
• 0 to 70 ˚C operating temperature
• Hyper Page Mode - EDO
• Performance:
tRAC RAS access time
tCAC CAS access time
tAA Access time from address
tRC Read/Write cycle time
tHPC Hyper page mode (EDO)
cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
89 104 124 ns
20 25 30 ns
• Single + 3.3 V (± 0.3 V) supply
• Low power dissipation
max. 252 mW active (-50 version)
max. 216 mW active (-60 version)
max. 198 mW active (-70 version)
• Standby power dissipation:
7.2 mW max. standby (LVTTL)
3.6 mW max. standby (LVCMOS)
720 µW max. standby (LVCMOS) for Low Power Version
• Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
• All inputs and outputs LVTTL compatible
• 1024 refresh cycles / 16 ms
• 1024 refresh cycles / 128 ms for Low Power Version
• Plastic Packages: P-SOJ-26/20-5 with 300 mil width
Semiconductor Group
1
4.96
1 page HYB 314405BJ/BJL-50/-60/-70
3.3V 1M x 4 EDO - DRAM
Absolute Maximum Ratings
Operating temperature range ............................................................................................0 to 70 ˚C
Storage temperature range......................................................................................– 55 to + 150 ˚C
Input/output voltage ..................................................................................................... – 1 to + 4.6 V
Power Supply voltage .................................................................................................. – 1 to + 4.6 V
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
DC Characteristics
TA = 0 to 70 ˚C, VSS = 0 V, VCC = 3.3 V ± 0.3 V, tT = 2 ns
Parameter
Symbol Limit Values
min.
max.
Unit Test
Condition
Input high voltage
Input low voltage
TTL Output high voltage (IOUT = – 2 mA)
TTL Output low voltage (IOUT = 2 mA)
VIH
2.0
VCC + 0.5 V
1)
VIL – 1.0 0.8 V 1)
VOH 2.4
–
V 1)
VOL –
0.4 V 1)
CMOS Output high voltage (IOUT = – 100 µA) VOH
VCC – 0.2 –
V
CMOS Output low voltage (IOUT = 100 µA)
Input leakage current, any input
(0 V < Vin < VCC + 0.3 V, all other input = 0 V)
VOL
II(L)
– 0.2
– 10 10
V
µA 1)
Output leakage current, any input
(DO is disabled, 0 V < VOUT < VCC + 0.3 V)
Average VCC supply current
-50 version
-60 version
-70 version
II(L)
ICC1
– 10
–
–
–
10
70
60
55
µA
mA 2) 3)4)
Standby VCC supply current
(RAS = CAS = WE = VIH)
ICC2
Average VCC supply current during RAS-only
refresh cycles
-50 version
-60 version
-70 version
ICC3
Average VCC supply current during hyper page
mode (EDO) operation
-50 version
-60 version
-70 version
ICC4
–
–
–
–
–
–
–
2 mA –
mA 2)4)
70
60
55
mA 2) 3)4)
70
60
55
Semiconductor Group
5
5 Page HYB 314405BJ/BJL-50/-60/-70
3.3V 1M x 4 EDO - DRAM
Read Cycle
Semiconductor Group
11
11 Page |
Páginas | Total 25 Páginas | |
PDF Descargar | [ Datasheet HYB314405BJBJL-50-.PDF ] |
Número de pieza | Descripción | Fabricantes |
HYB314405BJBJL-50- | 1M x 4-Bit Dynamic RAM | Siemens Semiconductor Group |
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