ADC0803 Datasheet PDF - Intersil Corporation
| Part Number | ADC0803 | |
| Description | 8-Bit/ Microprocessor-Compatible/ A/D Converters | |
| Manufacturers | Intersil Corporation | |
| Logo |  |
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®
Data Sheet
ADC0803, ADC0804
August 2002
FN3094.4
8-Bit, Microprocessor-Compatible, A/D
Converters
The ADC080X family are CMOS 8-Bit, successive-
approximation A/D converters which use a modified
potentiometric ladder and are designed to operate with the
8080A control bus via three-state outputs. These converters
appear to the processor as memory locations or I/O ports,
and hence no interfacing logic is required.
The differential analog voltage input has good common-
mode-rejection and permits offsetting the analog zero-input-
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Typical Application Schematic
ANY
µPROCESSOR
1 CS
2 RD
V+ 20 +5V 150pF
CLK R 19
3 WR CLK IN 4 10K
5 INTR
11 DB7
12 DB6
13 DB5
14 DB4
15 DB3
16 DB2
17 DB1
18 DB0
VIN (+)
VIN (-)
AGND
6
7
8
DIFF
INPUTS
VREF/2 9 VREF/2
DGND 10
8-BIT RESOLUTION
OVER ANY
DESIRED
ANALOG INPUT
VOLTAGE RANGE
Features
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
• Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . <100µs
• Easy Interface to Most Microprocessors
• Will Operate in a “Stand Alone” Mode
• Differential Analog Voltage Inputs
• Works with Bandgap Voltage References
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• Analog Voltage Input Range
(Single + 5V Supply) . . . . . . . . . . . . . . . . . . . . . . 0V to 5V
• No Zero-Adjust Required
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
Pinout
ADC0803, ADC0804
(PDIP)
TOP VIEW
CS 1
RD 2
WR 3
CLK IN 4
INTR 5
VIN (+) 6
VIN (-) 7
AGND 8
VREF/2 9
DGND 10
20 V+ OR VREF
19 CLK R
18 DB0 (LSB)
17 DB1
16 DB2
15 DB3
14 DB4
13 DB5
12 DB6
11 DB7 (MSB)
Ordering Information
PART NUMBER
ADC0803LCN
ADC0804LCN
ERROR
±1/2 LSB
±1 LSB
EXTERNAL CONDITIONS
VREF/2 Adjusted for Correct Full Scale
Reading
VREF/2 = 2.500VDC (No Adjustments)
TEMP. RANGE (oC)
PACKAGE
0 to 70
20 Ld PDIP
0 to 70
20 Ld PDIP
PKG. NO
E20.3
E20.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
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ADC0803, ADC0804
Timing Waveforms (Continued)
V+ V+
10K
RD DATA
CS OUTPUT
CL
2.4V
RD
0.8V
DATA
OUTPUTS
V+
VOI
tr = 20ns
tr
90%
50%
10%
t0H
10%
FIGURE 1C. t0H
FIGURE 1D. t0H, CL = 10pF
FIGURE 1. THREE-STATE CIRCUITS AND WAVEFORMS
Typical Performance Curves
1.8
-55oC TO 125oC
1.7
1.6
1.5
1.4
1.3
4.50
4.75 5.00 5.25
V+ SUPPLY VOLTAGE (V)
5.50
FIGURE 2. LOGIC INPUT THRESHOLD VOLTAGE vs SUPPLY
VOLTAGE
500
400
300
200
100
0
200 400 600 800
LOAD CAPACITANCE (pF)
1000
FIGURE 3. DELAY FROM FALLING EDGE OF RD TO OUTPUT
DATA VALID vs LOAD CAPACITANCE
3.5
3.1 VT(+)
2.7
-55oC TO 125oC
2.3
1.9
VT(-)
1.5
4.50
4.75
5.00
5.25
V+ SUPPLY VOLTAGE (V)
5.50
FIGURE 4. CLK IN SCHMITT TRIP LEVELS vs SUPPLY
VOLTAGE
1000
R = 50K
R = 10K
R = 20K
100
10
100
CLOCK CAPACITOR (pF)
FIGURE 5. fCLK vs CLOCK CAPACITOR
1000
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ADC0803 electronic component. |
| Information | Total 17 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ ADC0803.PDF Datasheet ] | |
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