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A29040-150 の電気的特性と機能

A29040-150のメーカーはAMIC Technologyです、この部品の機能は「512K X 8 Bit CMOS 5.0 Volt-only/ Uniform Sector Flash Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 A29040-150
部品説明 512K X 8 Bit CMOS 5.0 Volt-only/ Uniform Sector Flash Memory
メーカ AMIC Technology
ロゴ AMIC Technology ロゴ 




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A29040-150 Datasheet, A29040-150 PDF,ピン配置, 機能
A29040A Series
Preliminary
512K X 8 Bit CMOS 5.0 Volt-only,
Uniform Sector Flash Memory
Features
n 5.0V ± 10% for read and write operations
n Access times:
- 55/70/90 (max.)
n Current:
- 20 mA typical active read current
- 30 mA typical program/erase current
- 1 µA typical CMOS standby
n Flexible sector architecture
- 8 uniform sectors of 64 Kbyte each
- Any combination of sectors can be erased
- Supports full chip erase
- Sector protection:
A hardware method of protecting sectors to prevent
any inadvertent program or erase operations within
that sector
n Embedded Erase Algorithms
- Embedded Erase algorithm will automatically erase
the entire chip or any combination of designated
sectors and verify the erased sectors
General Description
The A29040A is a 5.0 volt-only Flash memory organized as
524,288 bytes of 8 bits each. The 512 Kbytes of data are
further divided into eight sectors of 64 Kbytes each for flexible
sector erase capability. The 8 bits of data appear on I/O0 - I/O7
while the addresses are input on A0 to A18. The A29040A is
offered in 32-pin PLCC, TSOP, and PDIP packages. This
device is designed to be programmed in-system with the
standard system 5.0 volt VCC supply. Additional 12.0 volt VPP
is not required for in-system write or erase operations.
However, the A29040A can also be programmed in standard
EPROM programmers.
The A29040A has a second toggle bit, I/O2, to indicate
whether the addressed sector is being selected for erase, and
also offers the ability to program in the Erase Suspend mode.
The standard A29040A offers access times of 55, 70 and 90
ns, allowing high-speed microprocessors to operate without
wait states. To eliminate bus contention the device has
separate chip enable ( CE ), write enable ( WE ) and output
enable ( OE ) controls.
The device requires only a single 5.0 volt power supply for
both read and write functions. Internally generated and
regulated voltages are provided for the program and erase
operations.
- Embedded Program algorithm automatically writes
and verifies bytes at specified addresses
n Typical 100,000 program/erase cycles per sector
n 20-year data retention at 125°C
- Reliable operation for the life of the system
n Compatible with JEDEC-standards
- Pinout and software compatible with single-power-
supply Flash memory standard
- Superior inadvertent write protection
n Data Polling and toggle bits
- Provides a software method of detecting completion
of program or erase operations
n Erase Suspend/Erase Resume
- Suspends a sector erase operation to read data from,
or program data to, a non-erasing sector, then
resumes the erase operation
n Package options
- 32-pin P-DIP, PLCC, or TSOP (Forward type)
The A29040A is entirely software command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register contents
serve as input to an internal state-machine that controls the
erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and
erase operations. Reading data out of the device is similar to
reading from other Flash or EPROM devices.
Device programming occurs by writing the proper program
command sequence. This initiates the Embedded Program
algorithm - an internal algorithm that automatically times the
program pulse widths and verifies proper program margin.
Device erasure occurs by executing the proper erase
command sequence. This initiates the Embedded Erase
algorithm - an internal algorithm that automatically
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper erase margin.
PRELIMINARY (August, 2001, Version 0.1)
1
AMIC Technology, Inc.

1 Page





A29040-150 pdf, ピン配列
Block Diagram
VCC
VSS
WE State
Control
Command
Register
CE
OE
A0-A18
VCC Detector
Erase Voltage
Generator
A29040A Series
I/O0 - I/O7
Input/Output
Buffers
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
STB Data Latch
Timer
STB
Y-Decoder
X-decoder
Y-Gating
Cell Matrix
Pin Descriptions
Pin No.
A0 - A18
I/O0 - I/O7
CE
WE
OE
VSS
VCC
Description
Address Inputs
Data Inputs/Outputs
Chip Enable
Write Enable
Output Enable
Ground
Power Supply
PRELIMINARY (August, 2001, Version 0.1)
3
AMIC Technology, Inc.


3Pages


A29040-150 電子部品, 半導体
A29040A Series
Autoselect Mode
The autoselect mode provides manufacturer and device
identification, and sector protection verification, through
identifier codes output on I/O7 - I/O0. This mode is primarily
intended for programming equipment to automatically
match a device to be programmed with its corresponding
programming algorithm. However, the autoselect codes
can also be accessed in-system through the command
register.
When using programming equipment, the autoselect mode
requires VID (11.5V to 12.5 V) on address pinA9. Address
pins A6, A1, and AO must be as shown in Autoselect
Codes (High Voltage Method) table. In addition, when
verifying sector protection, the sector address must appear
on the appropriate highest order address bits. Refer to the
corresponding Sector Address Tables. The Command
Definitions table shows the remaining address bits that are
don't care. When all necessary bits have been set as
required, the programming equipment may then read the
corresponding identifier code on I/O7 - I/O0.To access the
autoselect codes in-system, the host system can issue the
autoselect command via the command register, as shown
in the Command Definitions table. This method does not
require VID. See "Command Definitions" for details on
using the autoselect mode.
Table 3. A29040A Autoselect Codes (High Voltage Method)
Description
Manufacturer ID: AMIC
Device ID: A29040A
Sector Protection
Verification
A18 - A16 A15 - A10 A9 A8 - A7 A6 A5 - A2 A1 AO
X
X
Sector
Address
X
VID X
VIL X
VIL VIL
X
VID X
VIL X
VIL VIH
X
VID X
VIL X
VIH VIL
Continuation ID
X X VID X VIL X VIH VIH
Identifier Code on
I/O7 - I/O0
37h
86h
0lh (protected)
00h (unprotected)
7Fh
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and
erase operations in previously protected sectors.
Sector protection/unprotection must be implemented using
programming equipment. The procedure requires a high
voltage (VID) on address pin A9 and the control pins.
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
VCC power-up transitions, or from system noise. The device
is powered up to read array data to avoid accidentally writing
data to the array.
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on OE , CE or WE
do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE =VIL,
CE = VIH or WE = VIH. To initiate a write cycle, CE and
WE must be a logical zero while OE is a logical one.
Power-Up Write Inhibit
If WE = CE = VIL and OE = VIH during power up, the
device does not accept commands on the rising edge of
WE . The internal state machine is automatically reset to
reading array data on the initial power-up.
PRELIMINARY (August, 2001, Version 0.1)
6
AMIC Technology, Inc.

6 Page



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部品番号部品説明メーカ
A29040-150

512K X 8 Bit CMOS 5.0 Volt-only/ Uniform Sector Flash Memory

AMIC Technology
AMIC Technology


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