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97CFDC の電気的特性と機能

97CFDCのメーカーはSMSC Corporationです、この部品の機能は「USB FLOPPY DISK CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 97CFDC
部品説明 USB FLOPPY DISK CONTROLLER
メーカ SMSC Corporation
ロゴ SMSC Corporation ロゴ 




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97CFDC Datasheet, 97CFDC PDF,ピン配置, 機能
March 1992
96L02 DM96L02
Dual Retriggerable Resettable
Monostable Multivibrator
General Description
The 96L02 is a dual TTL monostable multivibrator with trig-
ger mode selection reset capability rapid recovery inter-
nally compensated reference levels and high speed capabil-
ity Output pulse duration and accuracy depend on external
timing components and are therefore under user control for
each application It is well suited for a broad variety of appli-
cations including pulse delay generators square wave gen-
erators long delay timers pulse absence detectors fre-
quency detectors clock pulse generators and fixed-frequen-
cy dividers Each input is provided with a clamp diode to
limit undershoot and minimize ringing induced by fast fall
times acting on system wiring impedances
Features
Y Retriggerable 0% to 100% duty cycle
Y DC level triggering insensitive to transition times
Y Leading or trailing-edge triggering
Y Complementary outputs with active pull-ups
Y Pulse width compensation for DVCC and DTA
Y 50 ns to % output pulse width range
Y Optional retrigger lock-out capability
Y Resettable for interrupt operations
Connection Diagram
Logic Symbol
Dual-In-Line Package
TL F 10203 – 1
Order Number 96L02DMQB
96L02FMQB or DM96L02N
See NS Package Number J16A N16E or W16A
VCC e Pin 16
GND e Pin 8
Pin Names
I0
I1
CD
Q
Q
CX
RX
Description
Trigger Input (Active Falling Edge)
Trigger Input (Active Rising Edge)
Direct Clear Input (Active LOW)
Positive Pulse Output
Complementary Pulse Output
External Capacitor Connection
External Resistor Connection
TL F 10203 – 2
C1995 National Semiconductor Corporation TL F 10203
RRD-B30M105 Printed in U S A

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97CFDC pdf, ピン配列
Switching Characteristics VCC e a5 0V TA e a25 C
Symbol
Parameter
Conditions
tPLH
tPHL
tPLH
tPHL
Propagation Delay I0 to Q
I1 to Q
Propagation Delay I0 to Q
I1 to Q
Propagation Delay CD to Q
CD to Q
VCC e 5 0V RX e 20 kX
CX e 0 CL e 15 pF
VCC e 5 0V RX e 20 kX
CX e 0 CL e 15 pF
VCC e 5 0V RX e 39 kX
CX e 1000 pF
96L02 (Mil)
Min Max
75
62
100
Functional Block Diagram
DM96L02 (Com)
Min Max
80
65
Units
ns
ns
ns
Operation Notes
1 TRIGGERING can be accomplished by a positive-going
transition on pin 4 (12) or a negative-going transition on
pin 5 (11) Triggering begins as a signal crosses the input
VIL VIH threshold region this activates an internal latch
whose unbalanced cross-coupling causes it to assume a
preferred state As the latch output goes LOW it disables
the gates leading to the Q output and through an invert-
er turns on the capacitor discharge transistor The invert-
ed signal is also fed back to the latch input to change its
state and effectively end the triggering action thus the
latch and its associated feed-back perform the function of
a differentiator
The emitters of the latch transistors return to ground
through an enabling transistor which must be turned off
between successive triggers in order for the latch to pro-
ceed through the proper sequence when triggering is de-
sired Pin 5 (11) must be HIGH in order to trigger at pin 4
(12) conversely pin 4 (12) must be LOW in order to trig-
ger at pin 5 (11)
2 RETRIGGERING In a normal cycle triggering initiates a
rapid discharge of the external timing capacitor followed
by a ramp voltage run-up at pin 2 (14) The delay will time
out when the ramp voltage reaches the upper trigger
point of a Schmitt circuit causing the outputs to revert to
the quiescent state If another trigger occurs before the
ramp voltage reaches the Schmitt threshold the capaci-
tor will be discharged and the ramp will start again without
having disturbed the output The delay period can there-
fore be extended for an arbitrary length of time by insur-
ing that the interval between triggers is less than the de-
lay time as determined by the external capacitor and re-
sistor
3 NON-RETRIGGERABLE OPERATION Retriggering can
be inhibited logically by connecting pin 6 (10) back to pin
4 (12) or by connecting pin 7 (9) back to pin 5 (11) Either
hook-up has the effect of keeping the latch-enabling tran-
sistor turned on during the delay period which prevents
the input latch from cycling as discussed above in the
section on triggering
TL F 10203 – 3
4 OUTPUT PULSE WIDTH An external resistor RX and an
external capacitor CX are required as shown in the func-
tional block diagram To minimize stray capacitance and
noise pickup RX and CX should be located as close as
possible to the circuit In applications which require re-
mote trimming of the pulse width as with a variable resis-
tor RX should consist of a fixed resistor in series with the
variable resistor the fixed resistor should be located as
close as possible to the circuit The output pulse width tw
is defined as follows where RX is in kX CX is in pF and
tw is in ns
tw e 0 33 RXCX (1 a 3 RX) for CX t 103 pF
16 kX s RX s 220 kX for 0 C to a75 C
20 kX s RX s 100 kX for b55 C to a125 C
CX may vary from 0 to any value For pulse widths with CX
less than 103 pF see Figure a
5 SETUP AND RELEASE TIMES The setup times listed
below are necessary to allow the latch-enabling transistor
to turn off and the node voltages within the input latch to
stabilize thus insuring proper cycling of the latch when
the next trigger occurs The indicated release times
(equivalent to trigger duration) allow time for the input
latch to cycle and its signal to propagate
Input to Pin 5 (11)
Pin 4 (12) e L
Pin 3 (13) e H
TL F 10203 – 4
3


3Pages


97CFDC 電子部品, 半導体
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 96L02FMQB
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or
systems which (a) are intended for surgical implant
into the body or (b) support or sustain life and whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling can
be reasonably expected to result in a significant injury
to the user
2 A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system or to affect its safety or
effectiveness
National Semiconductor
Corporation
1111 West Bardin Road
Arlington TX 76017
Tel 1(800) 272-9959
Fax 1(800) 737-7018
National Semiconductor
Europe
Fax (a49) 0-180-530 85 86
Email cnjwge tevm2 nsc com
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Hong Kong Ltd
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Ocean Centre 5 Canton Rd
Tsimshatsui Kowloon
Hong Kong
Tel (852) 2737-1600
Fax (852) 2736-9960
National Semiconductor
Japan Ltd
Tel 81-043-299-2309
Fax 81-043-299-2408
National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications

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部品番号部品説明メーカ
97CFDC

USB FLOPPY DISK CONTROLLER

SMSC Corporation
SMSC Corporation


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