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ACT-E128K32N-140P3I の電気的特性と機能

ACT-E128K32N-140P3IのメーカーはAeroflex Circuit Technologyです、この部品の機能は「ACT-E128K32 High Speed 4 Megabit EEPROM Multichip Module」です。


製品の詳細 ( Datasheet PDF )

部品番号 ACT-E128K32N-140P3I
部品説明 ACT-E128K32 High Speed 4 Megabit EEPROM Multichip Module
メーカ Aeroflex Circuit Technology
ロゴ Aeroflex Circuit Technology ロゴ 




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ACT-E128K32N-140P3I Datasheet, ACT-E128K32N-140P3I PDF,ピン配置, 機能
ACT–E128K32 High Speed
4 Megabit EEPROM Multichip Module
Features
CIRCUIT TECHNOLOGY
www.aeroflex.com
4 Low Power 128K x 8 EEPROM Die in One MCM
Package
Organized as 128K x 32
User Configurable to 256K x 16 or 512K x 8
CMOS and TTL Compatible Inputs and Outputs
Access Times of 120,140,150, 200, 250& 300ns
+5V ±10% Supply
Automatic Page Write Operation
Page Write Cycle Time: 10ms Max
Data Retention Ten Years Minimum
Low Power CMOS
Data Polling for End of Write Detection
Industry Standard Pinouts
Packaging – Hermetic Ceramic
66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,
Aeroflex code# "P3"
66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
68 Lead, .88" x .88" x .200" Dual-Cavity Small
Outline Gull Wing, Aeroflex code# "F2" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
MIL-PRF-38534 Compliant MCMs Available
Hardware and Software Data Protection
Internal Decoupling Capacitors for Low Noise
Operation
Commercial, Industrial and Military Temperature
Ranges
SMD# 5962–94585 Released (P7 & F2)
General Description
Block Diagram – PGA Type Package (P3,P7) & CQFP (F2)
WE1 CE1 WE2 CE2 WE3 CE3 WE4 CE4
A0 – A16
OE
128Kx8 128Kx8 128Kx8 128Kx8
8
I/O0-7
88
8
I/O8-15 I/O16-23 I/O24-31
Pin Description
I/O0-31 Data I/O
A0–16 Address Inputs
WE1-4 Write Enables
OE Output Enable
CE1-4 Chip Enables
VCC Power Supply
GND
Ground
The ACT–E128K32 is a high
speed, 4 megabit, CMOS
EEPROM multichip module
(MCM) designed for full
temperature range military,
space, or high reliability
applications. The MCM can be
organized as a 256K x 16 bits
or 512K x 8 bits device and is
input and output CMOS and
TTL compatible. Writing is
executed when the write enable
(WE) and chip enable (CE)
inputs are low and output
enable (OE) is high. Reading is
accomplished when WE is high
and CE and OE are both low.
Access times grades of
120, 140, 150, 200, 250 & 300ns
are standard.
The ACT–E128K32 is
packaged in a choice of
hermetically sealed co-fired
ceramic packages, a 66 pin,
1.08" sq PGA or a 68 lead, .88"
sq gullwing CQFP. The device
operates over the temperature
range of -55°C to +125°C and
military environment.
eroflex Circuit Technology - Advanced Multichip Modules © SCD1662 REV B 9/5/01

1 Page





ACT-E128K32N-140P3I pdf, ピン配列
Parameter
Write Cycle Time
Address Set-up Time
Write Pulse Width (WE or CE)
Chip Enable Set-up Time
Address Hold Time
Data Hold Time
Chip Enable Hold Time
Data Set-up Time
Output Enable Set-up Time
Output Enable Hold Time
AC Write Characteristics
(VCC = 5V, VSS = 0V, TC = -55°C to +125°C)
Symbol
tWC
tAS
tWP
tCE
tAH
tDH
tCEH
tDS
tOES
tOEH
Min Max
10
10
150
0
100
10
0
100
10
10
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC Read Characteristics
(VCC = 5V, VSS = 0V, TC = -55°C to +125°C)
Read Cycle Parameter
–120
–140
–150
–200
–250
–300
Symbol
Units
Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time
tRC 120 140 150 200 250 300
ns
Address Access Time
tACC 120 140 150 200 250 300 ns
Chip Enable Access Time
tACE 120 140 150 200 250 300 ns
Output Hold From Address Change, tOH
0
0
0
0
00
ns
OE or CE
Output Enable to Output Valid
tOE 0 55 0 55 0 55 0 55 0 85 0 85 ns
Chip Enable or OE to High Z Output tDF
70 70 70 70 70 70 ns
Page Write Characteristics
(VCC = 5V, VSS = 0V, TC = -55°C to +125°C)
Parameter
Write Cycle Time
Address Set-up Time
Address Hold Time , See Note 1
Data Set-up Time
Data Hold Time
Write Pulse Width
Byte Load Cycle Time
Write Pulse Width High
Note 1 – Page Address must remain valid for duration of write cycle.
Symbol
tWC
tAS
tAH
tDS
tDH
tWP
tBLC
tWPH
Minimum
10
100
100
10
150
50
Maximum
10
150
Units
ms
ns
ns
ns
ns
ns
µs
ns
A
Aeroflex Circuit Technology
3 SCD1662 REV B 9/5/01 Plainview NY (516) 694-6700


3Pages


ACT-E128K32N-140P3I 電子部品, 半導体
Parameter
Data Hold Time
OE Hold Time
OE to Output Valid
Write Recovery Time
Guaranteed. But not tested.
Data Polling Characteristics
(VCC = 5V, VSS = 0V, TC = -55°C to +125°C)
Symbol Min Max Units
tDH 10
ns
tOEH
10
ns
tOE 55 ns
tWR 0
ns
Figure 1
AC Test Circuit
Current Source
IOL
To Device Under Test
CL =
50 pF
VZ ~ 1.5 V
(Bipolar Supply)
IOH
Parameter
Input Pulse Level
Input Rise and Fall
Input and Output Timing Reference Level
Output Lead Capacitance
Typical
0 – 3.0
5
1.5
50
Units
V
ns
V
pF
Current Source
Notes:
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance ZO = 75Ω. 4) VZ is typically the
midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance load circuit. 6) ATE Tester includes jig capacitance.
A
Figure 2
Write Waveforms – WE Controlled
OE
ADDRESS
CE
WE
DATA IN
tOES
tAS
tCE
tOEH
tWC
tCEH
tAH
tWP
tDS
tWPH
tDH
Aeroflex Circuit Technology
6 SCD1662 REV B 9/5/01 Plainview NY (516) 694-6700

6 Page



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共有リンク

Link :


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