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AD5222 の電気的特性と機能

AD5222のメーカーはAnalog Devicesです、この部品の機能は「Increment/Decrement Dual Digital Potentiometer」です。


製品の詳細 ( Datasheet PDF )

部品番号 AD5222
部品説明 Increment/Decrement Dual Digital Potentiometer
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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AD5222 Datasheet, AD5222 PDF,ピン配置, 機能
a
FEATURES
128-Position, 2-Channel
Potentiometer Replacement
10 k, 50 k, 100 k, 1 M
Very Low Power: 40 A Max
؎2.7 V Dual Supply Operation or
2.7 V to 5.5 V Single Supply Operation
Increment/Decrement Count Control
APPLICATIONS
Stereo Channel Audio Level Control
Mechanical Potentiometer Replacement
Remote Incremental Adjustment Applications
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Line Impedance Matching
Increment / Decrement
Dual Digital Potentiometer
AD5222
FUNCTIONAL BLOCK DIAGRAM
VDD AD5222
U/D
UP/DOWN
COUNTER
DECODE
CS
MODE
DACSEL
CLK
GND
POR
DAC
SELECT
AND
ENABLE
UP/DOWN
COUNTER
DECODE
A1
W1
B1
A2
W2
B2
VSS
GENERAL DESCRIPTION
The AD5222 provides a dual channel, 128-position, digitally
controlled variable-resistor (VR) device. This device performs
the same electronic adjustment function as a potentiometer or
variable resistor. These products were optimized for instrument
and test equipment push-button applications. Choices between
bandwidth or power dissipation are available as a result of the
wide selection of end-to-end terminal resistance values.
The AD5222 contains two fixed resistors with wiper contacts that
tap the fixed resistor value at a point determined by a digitally
controlled up/down counter. The resistance between the wiper
and either end point of the fixed resistor provides a constant
resistance step size that is equal to the end-to-end resistance
divided by the number of positions (e.g., R STEP = 10 k/128 =
78 ). The variable resistor offers a true adjustable value of
resistance, between Terminal A and the wiper, or Terminal B
and the wiper. The fixed A-to-B terminal resistance of 10 k,
50 k, 100 k, or 1 Mhas a nominal temperature coefficient
of –35 ppm/°C.
The chip select CS, count CLK and U/D direction control inputs
set the variable resistor position. The MODE determines whether
both VRs are incremented together or independently. With
MODE at logic zero, both wipers are incremented UP or DOWN
without changing the relative settings between the wipers. Also,
the relative ratio between the wipers is preserved if either wiper
reaches the end of the resistor array. In the independent MODE
(Logic 1) only the VR determined by the DACSEL pin is changed.
DACSEL (Logic 0) changes RDAC 1. These inputs, which con-
trol the internal up/down counter, can be easily generated with
mechanical or push-button switches (or other contact closure
devices). This simple digital interface eliminates the need for
microcontrollers in front panel interface designs.
The AD5222 is available in the surface-mount (SO-14) package.
For ultracompact solutions, selected models are available in the
thin TSSOP-14 package. All parts are guaranteed to operate
over the extended industrial temperature range of –40°C to
+85°C. For 3-wire, SPI-compatible interface applications, see
the AD5203/AD5204/AD5206, AD7376, and AD8400/AD8402/
AD8403 products.
U/D
INCREMENT
5V
CS
U/D
CLK
VDD
A1
W1
B1
DACSEL
MODE
GND
A2
W2
B2
VSS
Figure 1. Typical Push-Button Control Application
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999

1 Page





AD5222 pdf, ピン配列
AD5222
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C, unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, –5 V
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, VDD
AX – BX, AX – WX, BX – WX . . . . . . . . . . . . . . . . . . . ± 20 mA
Digital Input Voltage to GND . . . . . . . . . . . . 0 V, VDD + 0.3 V
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature (TJ max) . . . . . . . . . . 150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Package Power Dissipation . . . . . . . . . . . . . (TJ max – TA)/θJA
Thermal Resistance θJA,
SOIC (SO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
CS
CLK
tCSS
tCL
tUDS
tCH
U/D
tDSS
tUDH
tCSH
DACSEL
tMDS
MODE
tDSH
tMDH
Figure 2. Detail Timing Diagram
CS CLK U/D
Lt
Lt
HX
H
L
X
Truth Table
Operation
Wiper Increment Toward Terminal A
Wiper Decrement Toward Terminal B
Wiper Position Fixed
Common Mode (MODE = 0) moves both wipers together either
UP or DOWN the resistor array without changing the relative
distance between the wipers. Also, the distance between both
wipers is preserved if either reaches the end of the array. Inde-
pendent Mode (MODE = 1) allows user to control each RDAC
individually: DACSEL = 0 sets RDAC1; DACSEL = 1: sets
RDAC2.
ORDERING GUIDE
Model
Kilo Package Package
Ohms Temperature Description Option
AD5222BR10 10
AD5222BRU10 10
AD5222BR50 50
AD5222BRU50 50
AD5222BR100 100
AD5222BRU100 100
AD5222BR1M 1,000
AD5222BRU1M 1,000
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
–40°C/+85°C
SO-14
TSSOP-14
SO-14
TSSOP-14
SO-14
TSSOP-14
SO-14
TSSOP-14
R-14
RU-14
R-14
RU-14
R-14
RU-14
R-14
RU-14
The AD5222 die size is 56 mil × 60 mil, 3360 sq. mil; 1.4224 mm × 1.524 mm,
2.1677 sq. mm. Contains 1503 transistors. Patent Number 5495245 applies.
PIN FUNCTION DESCRIPTIONS
Pin Name Description
1 B1
B Terminal RDAC #1.
2 A1
A Terminal RDAC #1.
3 W1
Wiper RDAC #1, DACSEL = 0.
4 VSS
Negative Power Supply. Specified for operation
at both 0 V or –2.7 V (Sum of |VDD| + |VSS|
< 5.5 V).
5 W2
Wiper RDAC #2, DACSEL = 1.
6 A2
A Terminal RDAC #2.
7 B2
B Terminal RDAC #2.
8 GND Ground.
9 MODE Common MODE = 0, Independent MODE = 1.
10 DACSEL DAC Select determines which wiper is incre-
mented in the Independent MODE = 1.
DACSEL = 0 sets RDAC1, DACSEL = 1 sets
RDAC2.
11 U/D
UP/DOWN Direction Control.
12 CLK
13 CS
Serial Clock Input, Negative Edge Triggered.
Chip Select Input, Active Low. When CS is
high, the UP/DOWN counter is disabled.
14 VDD
Positive Power Supply. Specified for operation
at both +3 V or +5 V. (Sum of |VDD| + |VSS|
< 5.5 V).
PIN CONFIGURATION
B1 1
A1 2
14 VDD
13 CS
W1 3 AD5222 12 CLK
VSS
4
TOP VIEW
(Not to Scale)
11
U/D
W2 5
10 DACSEL
A2 6
9 MODE
B2 7
8 GND
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD5222 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
WARNING!
ESD SENSITIVE DEVICE


3Pages


AD5222 電子部品, 半導体
AD5222
1200
1000
800
600
A – VDD = 5.5V
CODE = 15H
B – VDD = 3.3V
CODE = 15H
C – VDD = 5.5V
CODE = 3FH
D – VDD = 3.3V
CODE = 3FH
400
TA = 25؇C
AB
200
C
0D
1 10k 100k 1M 10M
FREQUENCY – Hz
Figure 15. IDD, ISS Supply Current vs. Clock Frequency
100
TA = 25؇C
90
80
VDD/VSS = 2.7V/0V
70
60
50
VDD/VSS = ؎2.7V
40
30
VDD/VSS = 5.5V/0V
20
10
–3
–2 –1
0 12 3
COMMON MODE – Volts
4
56
Figure 16. Incremental Wiper Contact Resistance vs.
VDD/ VSS
1
LOGIC = 0V OR VDD
0.1
0.01
VDD = 2.7V
VDD = 5.5V OR VDD/VSS = ؎2.7V
0.001
–40
–15 10
35
TEMPERATURE – ؇C
60
85
Figure 17. Supply Current vs. Temperature
10
VDD = 5.5V
1 VA = 5.5V
0.1 VDD/VSS = ؎2.5V
VA = 2.5V
0.01
0.001
0
VDD = 2.7V
VA = 2.7V
12 34 5
INPUT LOGIC VOLTAGE – V
6
Figure 18. Supply Current vs. Input Logic Voltage
VDD = 2.7V
VA = 2.7V
VB = 0V
VW
20mV/DIV
2V/DIV
CLK
Figure 19. Midscale Transition 3FH to 40H
VDD = 2.7V
VA = 2.7V
VB = 0V
VWA
VWB
20mV/DIV
CLK
2V/DIV
Figure 20. Stereo Step Transition, Mode = 0
–6– REV. 0

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