PDF ADV7192 Data sheet ( Hoja de datos )

Número de pieza	ADV7192
Descripción	Video Encoder with Six 10-Bit DACs/ 54 MHz Oversampling and Progressive Scan Inputs
Fabricantes	Analog Devices
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No Preview Available ! a Video Encoder with Six 10-Bit DACs, 54 MHz Oversampling and Progressive Scan Inputs ADV7192 FEATURES Six High-Quality 10-Bit Video DACs 10-Bit Internal Digital Video Processing Multistandard Video Input Multistandard Video Output 4؋ Oversampling with Internal 54 MHz PLL Programmable Video Control Includes: Digital Noise Reduction Gamma Correction Black Burst LUMA Delay CHROMA Delay Multiple Luma and Chroma Filters Luma SSAF™ (Super Subalias Filter) Average Brightness Detection Field Counter Macrovision Rev. 7.1 CGMS (Copy Generation Management System) WSS (Wide Screen Signaling) Closed Captioning Support. Teletext Insertion Port (PAL-WST) 2-Wire Serial MPU Interface (I2C®-Compatible and Fast I2C) I2C Interface Supply Voltage 5 V and 3.3 V Operation 80-Lead LQFP Package APPLICATIONS DVD Playback Systems PC Video/Multimedia Playback Systems Progressive Scan Playback Systems GENERAL DESCRIPTION The ADV7192 is part of the new generation of video encoders from Analog Devices. The device builds on the performance of previous video encoders and provides new features like interfac- ing progressive scan devices, Digital Noise Reduction, Gamma Correction, 4× Oversampling and 54 MHz operation, Average Brightness Detection, Black Burst Signal Generation, Chroma Delay, an additional Chroma Filter, and other features. The ADV7192 supports NTSC-M, NTSC-N (Japan), PAL N, PAL M, PAL-B/D/G/H/I and PAL-60 standards. Input standards supported include ITU-R.BT656 4:2:2 YCrCb in 8-Bit or 16-Bit format and 3× 10-Bit YCrCb progressive scan format. The ADV7192 can output Composite Video (CVBS), S-Video (Y/C), Component YUV or RGB and analog progressive scan in YPrPb format. The analog component output is also compatible with Betacam, MII, and SMPTE/EBU N10 levels, SMPTE 170 M NTSC, and ITU–R.BT 470 PAL. Please see Detailed Description of Features for more informa- tion about the ADV7192. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM DIGITAL INPUT 27MHz CLOCK ITU–R.BT 656/601 8-BIT YCrCb IN 4:2:2 FORMAT VIDEO INPUT PROCESSING VIDEO SIGNAL PROCESSING VIDEO OUTPUT PROCESSING PLL AND 54MHz DEMUX AND YCrCb- TO- YUV MATRIX COLOR CONTROL DNR GAMMA CORRECTION VBI TELETEXT CLOSED CAPTION CGMS/WSS CHROMA LPF SSAF LPF LUMA LPF 2؋ OVERSAMPLING OR 4؋ OVERSAMPLING 10-BIT DAC 10-BIT DAC 10-BIT DAC 10-BIT DAC 10-BIT DAC 10-BIT DAC I2C INTERFACE ADV7192 ANALOG OUTPUT COMPOSITE VIDEO Y [S-VIDEO] C [S-VIDEO] RGB YUV YPrPb TV SCREEN OR PROGRESSIVE SCAN DISPLAY SSAF is a trademark of Analog Devices Inc. This device is protected by U.S. patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced CCIR recommendations). I2C is a registered trademark of Philips Corporation. Throughout the document YUV refers to digital or analog component video. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 1 page ADV7192 5 V DYNAMIC–SPECIFICATIONS1 (VAA = 5 V ؎ 250 mV, speciﬁcations TMIN to VREF TMAX2 = 1.235 V, RSET1,2 unless otherwise = 1200 noted.) ⍀ unless otherwise noted. All Parameter Min Typ Max Unit Test Conditions Hue Accuracy Color Saturation Accuracy Chroma Nonlinear Gain Chroma Nonlinear Phase Chroma/Luma Intermod Chroma/Luma Gain Ineq Chroma/Luma Delay Ineq Luminance Nonlinearity Chroma AM Noise Chroma PM Noise Differential Gain3 Differential Phase3 SNR (Pedestal)3 SNR (Ramp)3 0.5 0.7 0.7 0.5 0.1 1.7 2.2 0.6 82 72 0.1 (0.4) 0.4 (0.15) 78.5 (78) 78 (78) 61.7 (61.7) 62 (63) 0.9 0.7 0.3 (0.5) 0.5 (0.3) Degrees % ±% ± Degrees ±% ±% ns ±% dB dB % Degrees dB rms dB p-p dB rms dB p-p Referenced to 40 IRE RMS Peak Periodic RMS Peak Periodic NOTES 1All measurements are made in 4× Oversampling Mode unless otherwise speciﬁed and are guaranteed by characterization. 2Temperature range TMIN to TMAX: 0°C to 70°C. 3Values in parentheses apply to 2× Oversampling Mode. Speciﬁcations subject to change without notice. 3.3 V DYNAMIC–SPECIFICATIONS1 (VAA = 3.3 V ؎ 150 mV, VREF = 1.235 V, RSET1,2 = 1200 speciﬁcations TMIN to TMAX2 unless otherwise noted.) ⍀ unless otherwise noted. All Parameter Min Typ Max Unit Test Conditions Hue Accuracy Color Saturation Accuracy Luminance Nonlinearity Chroma AM Noise Chroma PM Noise Chroma Nonlinear Gain Chroma Nonlinear Phase Chroma/Luma Intermod Differential Gain3 Differential Phase3 SNR (Pedestal)3 SNR (Ramp)3 0.5 0.8 0.6 83 71 0.7 0.5 0.1 0.2 (0.5) 0.5 (0.2) 78.5 (78) 78 (78) 62.3 (62) 61 (62.5) Degrees % ±% dB dB ±% ± Degrees ±% % Degrees dB rms dB p-p dB rms dB p-p Referenced to 40 IRE RMS Peak Periodic RMS Peak Periodic NOTES 1All measurements are made in 4× Oversampling Mode unless otherwise speciﬁed and are guaranteed by characterization. 2Temperature range TMIN to TMAX: 0°C to 70°C. 3Values in parentheses apply to 2× Oversampling Mode. Speciﬁcations subject to change without notice. REV. 0 –5– 5 Page ADV7192 DETAILED DESCRIPTION OF FEATURES Clocking: Single 27 MHz Clock Required to Run the Device 4؋ Oversampling with Internal 54 MHz PLL Square Pixel Operation Advanced Power Management Programmable Video Control Features: Digital Noise Reduction Black Burst Signal Generation Pedestal Level Hue, Brightness, Contrast, and Saturation Clamping Output Signal VBI (Vertical Blanking Interval) Subcarrier Frequency and Phase LUMA Delay CHROMA Delay Gamma Correction Luma And Chroma Filters Luma SSAF (Super Subalias Filter) Average Brightness Detection Field Counter Interlaced/Noninterlaced Operation Complete On-Chip Video Timing Generator Programmable Multimode Master/Slave Operation Macrovision Rev 7.1 CGMS (Copy Generation Management System) WSS (Wide Screen Signaling) Closed Captioning Support Teletext Insertion Port (PAL-WST) 2-Wire Serial MPU Interface (I2C-Compatible And Fast I2C) I2C Registers Synchronized to VSYNC GENERAL DESCRIPTION The ADV7192 is an integrated Digital Video Encoder that converts digital CCIR-601/656 4:2:2 8-bit or 16-bit component video data into a standard analog baseband television signal compatible with worldwide standards. Additionally, it is possible to input video data in 3ϫ 10-bit YCrCb progressive scan format to facilitate interfacing devices such as progressive scan systems. Six DACs are available on the ADV7192, each of which is capable of providing 4.33 mA of current. In addition to the composite output signal there is the facility to output S-Video (Y/C Video), RGB Video and YUV Video. All YUV formats (SMPTRE/EBU N10, MII or Betacam) are supported. The on-board SSAF (Super Subalias Filter) with extended lumi- nance frequency response and sharp stopband attenuation enables studio quality video playback on modern TVs, giving optimal horizontal line resolution. An additional sharpness control feature allows high-frequency enhancement on the luminance signal. Y DATA INPUT DNR MODE DNR CONTROL GAIN BLOCK SIZE CONTROL CORING GAIN DATA BORDER AREA CORING GAIN BORDER BLOCK OFFSET NOISE SIGNAL PATH INPUT FILTER BLOCK MAIN SIGNAL PATH SUBTRACT SIGNAL IN THRESHOLD RANGE FROM ORIGINAL SIGNAL FILTER OUTPUT <THRESHOLD? FILTER OUTPUT> THRESHOLD DNR OUT DNR SHARPNESS MODE Y DATA INPUT DNR CONTROL GAIN BLOCK SIZE CONTROL CORING GAIN DATA BORDER AREA CORING GAIN BORDER BLOCK OFFSET NOISE SIGNAL PATH INPUT FILTER BLOCK ADD SIGNAL ABOVE THRESHOLD RANGE TO ORIGINAL SIGNAL FILTER OUTPUT >THRESHOLD? MAIN SIGNAL PATH FILTER OUTPUT< THRESHOLD DNR OUT Figure 6. Block Diagram for DNR Mode and DNR Sharpness Mode PAL_NTSC VSO/CLAMP CSO_HSO SCL SDA ALSB Cr0–Cr9 Cb0–Cb9 Y0–Y9 HSYNC VSYNC BLANK RESET TTX TTXRQ P0 P15 CLKIN CLKOUT VIDEO TIMING GENERATOR TELETEXT INSERTION BLOCK 10 YCrCb- Y TO- 10 YUV U MATRIX 10 V 10 DNR Y AND 10 GAMMA U CORRECTION 10 V 10 10 10 CGMS/WSS AND CLOSED CAPTIONING CONTROL I2C MPU PORT BRIGHTNESS CONTROL AND ADD SYNC AND INTERPOLATOR PROGRAMMABLE LUMA FILTER AND SHARPNESS FILTER YUV-TO-RGB MATRIX AND YUV LEVEL CONTROL BLOCK SATURATION CONTROL AND ADD BURST AND INTERPOLATOR PROGRAMMABLE CHROMA FILTER MODULATOR AND HUE CONTROL DEMUX REAL-TIME SIN/COS ADV7192 CONTROL DDS PLL CIRCUIT BLOCK M U L T I P L E X E R I N T E R P O L A T IO NR T E R P O L A T O R 10-BIT DAC 10-BIT DAC 10-BIT DAC DAC CONTROL BLOCK 10-BIT DAC 10-BIT DAC 10-BIT DAC DAC CONTROL BLOCK DAC A DAC B DAC C VREF RSET2 COMP2 DAC D DAC F DAC E RSET1 COMP1 REV. 0 SCRESET/RTC/TR Figure 5. Detailed Functional Block Diagram –11– 11 Page

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