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CT1991 の電気的特性と機能

CT1991のメーカーはAeroflex Circuit Technologyです、この部品の機能は「MIL-STD-1553B Remote Terminal / BUS Controller or Passive Monitor Hybrid」です。


製品の詳細 ( Datasheet PDF )

部品番号 CT1991
部品説明 MIL-STD-1553B Remote Terminal / BUS Controller or Passive Monitor Hybrid
メーカ Aeroflex Circuit Technology
ロゴ Aeroflex Circuit Technology ロゴ 




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CT1991 Datasheet, CT1991 PDF,ピン配置, 機能
CT1990/1 Series
MIL-STD-1553B Remote Terminal, BUS Controller,
or Passive Monitor Hybrid with Status Word Control
www.aeroflex.com/Avionics
June 13, 2005
FEATURES
Performs the Complete Dual-Redundant Remote Terminal, Bus Controller Protocol and Passive Monitor Functions of MIL-STD-1553B
Automated Self-Test Functions
Allows Setting of the Message Error Bit on Illegal Commands
Provides Programmable Control over Terminal Flag and Subsystem Flag Status Bits
50mW Typical Power Consumption
+5V DC Operation
Full Military (-55°C to +125°C) Temperature Range
Advanced Low Power VLSI Technology
Compatible with all Aeroflex-Plainview Driver/Receiver Units
Designed for Commercial, Industrial and Aerospace Applications
MIL-PRF-38534 compliant devices available
Aeroflex-Plainview is a Class H & K MIL-PRF-38534 Manufacturer
Packaging – Hermetic Ceramic Plug-In - 90 Pin, 2.4"L x 1.6"W x .225"Ht
DESC SMD# 5962–94775: Released CT1990, Pending CT1991
Encoder
Interface
Unit
Sub Address
&
Word Count
Outputs
BUS "0"
BUS "1"
ASIC
T/R
Hybrid
ASIC
T/R
Hybrid
Driver
Select
&
Enable
Decoder
"O"
Decoder
"1"
Status
Word
Control
Internal
Highway
Control
Program
Inputs
Discrete
Outputs
Control
Inputs
Terminal
Address
Inputs
CT1990/1
Figure 1 – BLOCK DIAGRAM (WITH TRANSFORMERS)
DESCRIPTION
The Aeroflex-Plainview CT1990/1 Series is a monolithic implementation of the MIL-STD-1553B Bus Controller,
Remote Terminal and Passive Monitor functions. All protocol functions of MIL-STD-1553B are incorporated and
a number of options are included to improve flexibility. These features include programming of the status word,
illegalizing specific commands and an independent loop back self-test which is initiated by the subsystem. This
unit is directly compatible with all microprocessor interfaces such as the CT1611 and CT1800 produced by
Aeroflex.
SCDCT1990 Rev C

1 Page





CT1991 pdf, ピン配列
REMOTE TERMINAL OPERATION
Receive Data Operation
All valid data words associated with a valid receive data command word for the RT are passed to the subsystem.
The RT examines all command words from the bus and will respond to valid (i.e. correct Manchester, parity
coding etc.) commands which have the correct RT address (or broadcast address if the RT broadcast option is
enabled). When the data words are received, they are decoded and checked by the RT and, if valid, passed to the
subsystem on a word by word basis at 20µs intervals. This applies to receive data words in both Bus Controller to
RT and RT to RT messages. When the RT detects that the message has finished, it checks that the correct number
of words have been received and if the message is fully valid, then a Good Block Received signal is sent to the
subsystem, which must be used by the subsystem as permission to use the data just received.
The subsystem must therefore have a temporary buffer store up to 32 words long into which these data words can
be placed. The Good Block Received signal will allow use of the buffer store data once the message has been
validated.
If a block of data is not validated, then Good Block Received will not be generated. This may be caused by any
sort of message error or by a new valid command for the RT being received on another bus to which the RT must
switch.
Transmit Data Operation
If the RT receives a valid transmit data command addressed to the RT, then the RT will request the data words
from the subsystem for transmission on a word by word basis. To allow maximum time for the subsystem to
collect each data word, the next word is requested by the RT as soon as the transmission of the current word has
commenced.
It is essential that the subsystem should provide all the data words requested by the RT once a transmit sequence
has been accepted. Failure to do so will be classed by the RT as a subsystem failure and reported as such to the Bus
Controller.
Control of Data Transfers
This section describes the detailed operation of the data transfer mechanism between the RT and subsystems. It
covers the operations of the signals DTRQ, DTAK, IUSTB, H/L, GBR, NBGT, TX/RX during receive data and
transmit data transfers.
Figure 7 shows the operation of the data handshaking signals during a receive command with two data words.
When the RT has fully checked the command word, NBGT is pulsed low, which can be used by the subsystem as
an initialization signal. TX/RX will be set low indicating a receive command. When the first data word has been
fully validated, DTRQ is set low. The subsystem must then reply within approximately 1.5µs by setting DTAK
low. This indicates to the RT that the subsystem is ready to accept data. The data word is then passed to the
subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the byte
indicator (high byte first followed by low byte). Data is valid about both edges of IUSTB. Signal timing for this
handshaking is shown in Figure 12.
If the subsystem does not declare itself busy, then it must respond to DTRQ going low by setting DTAK low
within approximately 1.5µs. Failure to do so will be classed by the RT as a subsystem failure and reported as such
to the Bus Controller.
It should be noted that IUSTB is also used for internal working in the RT. DTRQ being low should be used as an
enable for clocking data to the subsystem with IUSTB.
Once the receive data block has finished and been checked by the RT, GBR is pulsed low if the block is entirely
correct and valid. This is used by the subsystem as permission to make use of the data block. If no GBR signal is
generated, then an error has been detected by the RT and the entire data block is invalid and no data words in it
may be used.
SCDCT1990 Rev C
3


3Pages


CT1991 電子部品, 半導体
Use of the Service Request Status Bit
The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous service is
requested.
The timing of the setting of this bit is the same as the Busy bit and is shown in Figure 13. Use of SERVREQ has
no effect on the RT apart from setting the Service Request bit.
It should be noted that certain mode commands require that the last status word be transmitted by the RT instead
of the current one, and therefore a currently set status bit will not be seen by the Bus Controller. Therefore the user
is advised to hold SERVREQ low until the requested service takes place.
Use of the Subsystem Status Bit
This status bit is used by the RT to indicate a subsystem fault condition. If the subsystem sets SSERR low at any
time, the subsystem fault condition in the RT will be set, and the Subsystem Flag status bit will subsequently be
set. The fault condition will also be set if a handshaking failure takes place during a data transfer to or from the
subsystem. The fault condition is cleared on power-up or by a Reset mode command.
Dynamic Bus Control Acceptance Status Bit
DBCACC, when set true, enables an RT to configure itself into a Bus Controller, if the subsystem has the
capability, by allowing DBCREQ to pulse true and BIT TIME 18 to be set in the status response. If Dynamic Bus
Control is not required then DBCACC must be tied high. DBCACC tied high inhibits DBCREQ and clears BIT
TIME 18 in the status response.
OPTIONAL STATUS WORD CONTROL
Message Error Bit
The CT1990/1 monitors all receptions for errors and sets the Message Error Bit as prescribed in MIL-STD-1553B.
The subsystem designer may, however, exercise the option of monitoring for illegal commands and forcing the
Message Error Bit to be set.
The word count and subaddress lines for the current command are valid when INCMD goes low. The subsystem
must then determine whether or not the word count or subaddress is to be considered illegal by the RT. If either of
them is considered illegal, the subsystem must produce a positive-going pulse called MEREQ. The positive-going
edge of MEREQ must occur within 500ns of the falling edge of INCMD .
Subsystem Flag and Terminal Flag Bits
The conditions that cause the Subsystem Flag and Terminal Flag Bits in the Status Word to be reset may be
controlled by the subsystem using the ENABLE, BIT DECODE, NEXT STATUS, and STATUS UPDATE inputs.
If ENABLE is inactive (high), then the Terminal Flag and Subsystem Flag behavior is the same as described
below: (i.e. the other three option lines are disabled).
Subsystem Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset
the remote terminal (code 01000).
This bit shall be set in the current status register if the subsystem error line, SSERR, from the subsystem
ever goes active low. This bit shall also be set if an RT/subsystem handshaking failure occurs. This bit, once
set, shall be repeatedly set until the detected error condition is known to be no longer present.
SCDCT1990 Rev C
6

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
CT1990

MIL-STD-1553B Remote Terminal / BUS Controller or Passive Monitor Hybrid

Aeroflex Circuit Technology
Aeroflex Circuit Technology
CT19901

MIL-STD-1553B Remote Terminal/ Bus Controller/ or Passive Monitor Hybrid with Status Word Control

Aeroflex Circuit Technology
Aeroflex Circuit Technology
CT1991

MIL-STD-1553B Remote Terminal / BUS Controller or Passive Monitor Hybrid

Aeroflex Circuit Technology
Aeroflex Circuit Technology
CT1995

MIL-STD-1553B Remote Terminal/ Bus Controller/ or Passive Monitor Hybrid with Status Word Control

Aeroflex Circuit Technology
Aeroflex Circuit Technology


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