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Datasheet H0500KC25S PDF ( 特性, スペック, ピン接続図 )

部品番号 H0500KC25S
部品説明 Fast Symmetrical Gate Turn-Off Thyristor
メーカ IXYS
ロゴ IXYS ロゴ 
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H0500KC25S Datasheet, H0500KC25S PDF,ピン配置, 機能
WESTCODE
An IXYS Company
Date:- 4 Aug, 2004
Data Sheet Issue:- 2
Fast Symmetrical Gate Turn-Off Thyristor
Type H0500KC25#
Absolute Maximum Ratings
VDRM
VRSM
VRRM
VRSM
VOLTAGE RATINGS
Repetitive peak off-state voltage, (note 1)
Non-repetitive peak off-state voltage, (note 1)
Repetitive peak reverse voltage
Non-repetitive peak reverse voltage
MAXIMUM
LIMITS
2500
2600
100-2000
100-2000
UNITS
V
V
V
V
ITGQM
Ls
IT(AV)M
IT(RMS)
ITSM
ITSM2
I2t
di/dtcr
PFGM
PRGM
IFGM
VRGM
toff
ton
Tjop
Tstg
RATINGS
Maximum peak turn-off current, (note 2)
Snubber loop inductance, ITM=ITGQM, (note 2)
Mean on-state current, Tsink=55°C (note 3)
Nominal RMS on-state current, 25°C (note 3)
Peak non-repetitive surge current tp=10ms
Peak non-repetitive surge current, (Note 4)
I2t capacity for fusing tp=10ms
Critical rate of rise of on-state current, (note 5)
Peak forward gate power
Peak reverse gate power
Peak forward gate current
Peak reverse gate voltage (note 6)
Minimum permissible off-time, ITM=ITGQM, (note 2)
Minimum permissible on-time
Operating temperature range
Storage temperature range
Notes:-
1) VGK=-2Volts.
2) Tj=125°C, VD=80%VDM, VDM<VDRM, diGQ/dt=20A/µs, CS=3µF.
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, tp=2ms
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
MAXIMUM
LIMITS
500
0.3
540
280
3.0
5.4
45
1000
160
5
100
18
60
10
-40 to +125
-40 to +150
UNITS
A
µH
A
A
kA
kA
kA2s
A/µs
W
kW
A
V
µs
µs
°C
°C
Data Sheet. Type H0500KC25# Issue 2
Page 1 of 15
August, 2004

1 Page



H0500KC25S pdf, ピン配列
WESTCODE An IXYS Company
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#
Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings.
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For
other gate conditions see the curves of figure 5. It should be noted that VDRM is the repeatable peak
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, VDC should ideally be limited to 60% VDRM in this product.
Diagram 1.
1.2 Reverse voltage rating.
All devices in this series have a minimum VRRM of 100 Volts. If specified at the time of order, a VRRM up to
80%VDRM is available.
1.3 Peak turn-off current.
The figure given in maximum ratings is the highest value for normal operation of the device under
conditions given in note 2 of ratings. For other combinations of ITGQ, VD and Cs see the curves of figures
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent CS should be used and Ls<0.3µH must be ensured for the curves to be
applied.
Ls
Ds R
Cs
Diagram 2.
1.4 R.M.S and average current.
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° half-
sinewave. These are included as a guide to compare the alternative types of GTO thyristors available,
values can not be applied to practical applications, as they do not include switching losses.
1.5 Surge rating and I2t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 4.
1.6 Snubber loop inductance.
Use of GTO thyristors with snubber loop inductance, Ls<0.3µH implies no dangerous Vs voltages (see
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
Vs should be limited to 700 Volts to avoid possible device failure.
Data Sheet. Type H0500KC25# Issue 2
Page 3 of 15
August, 2004


3Pages


H0500KC25S 電子部品, 半導体
WESTCODE An IXYS Company
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#
2.5 Gate trigger characteristics.
These are measured by slowly ramping up the gate current and monitoring the transition of anode current
and voltage (see diagram 7). Maximum and typical data of gate trigger current, for the full junction
temperature range, is given in the curves of figure 6. Only typical figures are given for gate trigger voltage,
however, the curves of figure 1 give the range of gate forward characteristics, for the full allowable
junction temperature range. The curves of figures 1 & 6 should be used in conjunction, when considering
forward gate drive circuit requirement. The gate drive requirements should always be calculated for lowest
junction temperature start-up condition.
Feedback
Current-
sence
R1
CT
Gate-drive
DUT
0.9VAK
C1 Vs
0.1IA
Not to scale
Anode current
Gate current
IGT Anode-Cathode
Voltage
Diagram 7, Gate trigger circuit and waveforms.
2.6 Turn-on characteristics
The basic circuit used for turn-on tests is given in diagram 8. The test is initiated by establishing a
circulating current in Tx, resulting in VD appearing across Cc/Lc. When the test device is fired Cc/Lc
discharges through DUT and commutates Tx off, as pulse from Cc/Lc decays the constant current source
continues to supply a fixed current to DUT. Changing value of Cc & Lc allows adjustment of ITM and di/dt
respectively, VD and i are also adjustable.
Cc Lc
R1
i Tx D
CT
Gate-drive
DUT
Cd Vd
Diagram 8, Turn-on test circuit of FT40.
The definitions of turn-on parameters used in the characteristic data are given in diagram 9. The gate
circuit conditions IGM & IG are fully adjustable, IGM duration 10µs.
diG/dt
IG
IGM
td tr
di/dt
VD
tgt
VD=VDM
ITM
Eon integral
period
Diagram 9, Turn-on wave-diagrams.
Data Sheet. Type H0500KC25# Issue 2
Page 6 of 15
August, 2004

6 Page





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