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Datasheet N682386 PDF ( 特性, スペック, ピン接続図 )

部品番号 N682386
部品説明 Dual Programmable Extended Codec/SLCC + SLFC
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N682386 Datasheet, N682386 PDF,ピン配置, 機能
N682386/87 + N681622
Dual Programmable Extended Codec/SLCC + SLFC
1. DESCRIPTION
The N682386/87, implements a dual channel FXS telephone line interface optimized for short loop applications. It
integrates SLCC (Subscriber Line Control Circuit) functionality with a dual programmable CODEC and a dual DC/DC
controller. The SLCC supports internal ringing up to 90 VPK (5 REN at 4k ft) ideal for Customer Premise Equipment
(CPE). The CODEC can be configured for μ-law, A-law or 16-bit linear PCM encoding. It also supports a
comprehensive set of signaling capabilities required to supervise and control the telephone lines. These include tone
generation, ring tones, DTMF detection/ generation as well as FSK generation. An on-chip Pulse Width Modulation
(PWM) driver allows control of an inductor based DC/DC converter. Programmable impedance and trans-hybrid
balancing allow for worldwide deployment.
2. FEATURES
¡ Complete BORSCHT functions
¡ Internal balanced and unbalanced ringing up to 90
VPK (5 REN up to 4k ft)
¡ Integrated Power Management Options
ƒ Integrated DC/DC controller regulates battery
voltage to minimize power dissipation in all
operating modes
ƒ Programmable external battery switching
¡ Programmable linefeed characteristics
ƒ Ringing Frequency, Amplitude, and Cadence
ƒ Trapezoidal and Sinusoidal waveforms
ƒ Two wire AC impedance, and trans-hybrid
balance
ƒ Constant Current feed (20 to 41) mA
ƒ Ring Trip and Loop Closure Thresholds
ƒ Ground Key Detection
¡ Programmable signal generation and detection
ƒ DTMF generation/ detection and Tone
generation
ƒ Frequency Shift Keying (FSK) Enhanced Caller
ID generation (Type I and Type II)
¡ Loop test and diagnostics support
ƒ Integrated loopback modes
ƒ Real-time linefeed monitoring
ƒ On-chip temperature sensor
ƒ Line Card Diagnostics Support
¡ Digital interfaces
ƒ PCM: G.711 μ-Law, A-Law and 16-bit linear
ƒ GCI and SPI bus
ƒ Programmable audio path gains
¡ Both PCM Master and Slave modes supported
¡ On-chip PLL for flexible clocking options including
1.0 MHz and 2.0 MHz BCLK operation
¡ Operating voltage: 3.3V
¡ Narrowband Codec (N682386)
¡ Wideband and Narrowband codec (N682387)
¡ Optional integrated (N681622) or discrete
Subscriber Line Feed Circuit
APPLICATIONS
¡ Residential VoIP Gateways / Routers/ IP-PBX
¡ Fiber to the Premise/Home (FTTP/H)
¡ Wireless Local Loop
¡ Optical Network Terminals (ONT)
¡ Analog Telephone Adapter (ATA)
¡ Voice enabled DSL/Cable Modems
¡ Integrated Access Devices
¡ Set Top Boxes
Ordering Information
Part Number
N682386MG
N682387MG
N682386YG
N682387YG
Temp
Range (oC)
-40 to 85
-40 to 85
Package
64-TQFP
64-QFN..
Package
Material
Pb-Free
Pb-Free
N681622YG -40 to 85
U.S. Patent # 7260212 B1
20-QFN
Pb-Free
! WARNING !
HIGH VOLTAGE WARNING USE EXTREME CAUTION
High voltage sources could cause serious injury or
death if not used in accordance with design and/or user
specifications, if they are used by untrained or
unqualified personnel. Before testing Nuvoton’s products
read and understand all instructions, and safety
procedures as in industry standard safe practices.
Revision 1.3
Page 1 of 160
Sep 2010

1 Page



N682386 pdf, ピン配列
N682386/87 + N681622
Dual Programmable Extended Codec/SLCC + SLFC
4. PIN DESCRIPTION
4.1. N682386/87 Pin Description
Pin Name
VDD2
RIP2
RIN2
TVB2
GND2
RVB2
RAC2
TAC2
CR2
CT2
GND4
VDD4
VREF2
IREF
DCL2
DCH2
INT
CS
SCLK
SDI
SDO
DCN2
DCP2
GND5
VDD5
DCN1
DCP1
PCMT
FS
BCLK
PCMR
DSY
RESET
DCH1
DCL1
VREF1
Pin No.
Functionality
1 Line-driver 3.3 V supply
2 Positive RING Driver current source & Voltage sense
3 Negative RING Driver current source
4 Positive TIP Driver Base Voltage Control
5 Line-driver ground supply
6 Positive RING Driver Base Voltage Control
7 RING Voice Band Input
8 TIP Voice Band Input
9 External Capacitor RING
10 External Capacitor TIP
11 Line-driver ground supply
12 Line-driver 3.3 V supply
13 Precision Reference Voltage
14 Current Reference
15 DC/DC Converter Current Sense LOWER input Voltage
16 DC/DC Converter Current Sense HIGHER input Voltage
17 Interrupt. Mask able interrupt. Open drain output for wired-or operation
18
Chip Select. When inactive, SCLK and SDI are ignored and SDO is high
impedance. When active, serial port is operational
19 Serial port bit clock. Controls serial data on SDO and latches data on SDI
20 Serial port data in. Serial port control data
21 Serial port data out. Serial port control data
22 DC/DC converter Control for external NPN BJT
23 DC/DC Converter Control for external PNP BJT
24 Logic I/O ground supply
25 3.3 V Logic I/O supply
26 DC/DC converter Control for external NPN BJT
27 DC/DC Converter Control for external PNP BJT
28 Serial PCM Transmit data
29 8 or 16 kHz Frame Sync
30 PCM Bit Clock. Also used as internal PLL reference clock
31 Serial PCM Receive data
32 SPI Daisy Chain Enable
33
Reset. Active Low. Hardware reset used to place all control registers in
default state.
34 DC/DC Converter Current Sense Higher input Voltage
35 DC/DC Converter Current Sense Lower input Voltage
36 Half Supply Reference Voltage to VDD
Revision 1.3
Page 3 of 160
A/D
Pin
Type
A P2
A I/O2
A O2
A O2
A G2
A O2
A I2
A I2
A I/O2
A I/O2
A G4
D P4
A I/O2
A I/O
A I2
A I2
DO
DI
DI
DI
DO
D O2
D O2
D G5
D P5
D O1
D O1
DO
D I/O
DI
DI
DI
DI
A I1
A I1
AP
Sep 2010


3Pages


N682386 電子部品, 半導体
5. BLOCK DIAGRAM
N682386/87 + N681622
Dual Programmable Extended Codec/SLCC + SLFC
Figure 3: Block Diagram
Revision 1.3
Page 6 of 160
Sep 2010

6 Page





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