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PDF ES9023 Data sheet ( Hoja de datos )
| Número de pieza | ES9023 | |
| Descripción | Premier Stereo DAC | |
| Fabricantes | ESS | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ES9023 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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Analog Reinvented
CONFIDENTIAL ADVANCE INFORMATION
ES9023
Premier Stereo DAC with 2Vrms Driver
Datasheet
Device Description
ES9023 Sabre Premier Stereo DAC
with 2Vrms Op-Amp Driver
DNR
(dB)
112
Power Supply
(Output Level)
+3.6V (2Vrms)
+3.3V (1.9Vrms)
No DC-blocking
capacitor
√
Pop-Noise
Free
√
Package
16-SOP
The ES9023 is a 24-bit stereo audio DAC with an integrated 2Vrms op-amp driver. Powered by the industry
proven Sabre DAC technology, the ES9023 combines best-sounding audio with lowest system cost and
highest performance into the ideal D/A converter for line-level output applications such as Blu-ray players,
CD/DVD players, set-top boxes, digital TVs and audio receivers.
With patented HyperstreamTM architecture and Time Domain Jitter Eliminator, the ES9023 delivers jitter-free
studio quality audio with 112dB DNR.
Using an integrated charge pump to generate the negative supply, the ES9023 can operate from a single
AVCC supply to drive a ground-referenced 2Vrms output, eliminating the need for output dc-blocking
capacitors. Optionally, the output level can be adjusted by using an external resistor, allowing for output
level below 2Vrms. Pop-noise is eliminated through a comprehensive suppression on power up/down, mute,
reset, loss of power or clock. Dedicated control/status pins allow easy system integration without the need
for microcontroller programming.
FEATURE
Sabre DAC and 2Vrms op-amp driver
integration
Patented HyperStreamTM and Jitter
Elimination Architecture
Adjustable output level
Ground reference output
Pop-noise suppression
Dedicated control/status pins
I2S or left-justified select
Soft mute enable
Zero detect output
Charge pump for negative supply
Low power consumption in 16-SOP
BENEFIT
Lowest system cost by minimizing external components
Highest performance
Best sounding audio – powered by Sabre DAC technology
Best dynamic range: 112dB
Jitter Immune
Allow designer to customize output level (up to 2Vrms)
based on application requirements via an external resistor
Reduce cost by eliminating blocking capacitors
Pop-free on power up/down, mute and reset
Easy to use – no programming required
Single AVCC simplifies power supply
Simply power supply and reduce PCB size
ESS TECHNOLOGY, INC. 48401 Fremont Blvd., Fremont, CA 94538, USA Tel (510) 492-1088 • Fax (510) 492-1098
1 page  
September 17, 2010
ES9023 Datasheet
CONFIDENTIAL ADVANCE INFORMATION Rev. 0.1
MUTE_B Pin (Active Low)
This input pin provides the ability to slowly ramp down the audio volume, and then enter low power standby. Release of mute
will cause the ES9023 to emerge from low power mode and then slowly ramp the audio to provide a pop free startup.
MUTE_B
(Internal) 0dB
Attenuation
(Internal)
Power Down
2097024
MCLK
-∞
32768 2097024
MCLK MCLK
Power up delay
AOUT
Activation/release of the MUTE_B input pin initiates a sequence of internal events detailed below:
• On assertion of the MUTE_B pin
o The output signal will ramp to the -∞ level. The ramping takes 2097024 MCLK cycles.
o After the output signal reaches the -∞ level, analog section is turned off and the ES9023 enters a low power
standby state.
• On release of the MUTE_B pin:
o The ES9023 emerges from low power standby, starts an internal counter and activates the analog section
o During the delay counter time, the internal charge pump and Vref stabilize.
o When the counter reaches 32768 MCLK cycles, the audio signal is applied and the volume is ramped over
2097024 MCLK cycles to maximum.
To minimize pop noise at power up, an external circuit should be used to hold the MUTE_B pin asserted until tDMUTE (see
p.10) after the power supply and MCLK are stabilized.
• This can be realized using a reset IC, an MCU GPIO pin (default to low at power-up and changed to high by software
later), or an RC time delay on this pin.
• If MUTE_B pin is released too early, pop noise may occur due to the ramp-up of internal voltage.
AVCC
MCLK
MUTE_B
Same time as AVCC or later
tDMUTE
Assert MUTE_B until tDMUTE after
the power supply and MCLK are
stabilized
5 ESS TECHNOLOGY, INC. 48401 Fremont Blvd., Fremont, CA 94538, USA Tel (510) 492-1088 • Fax (510) 492-1098
5 Page 
September 17, 2010
ES9023 Datasheet
16 Pin SOP Mechanical Dimensions
CONFIDENTIAL ADVANCE INFORMATION Rev. 0.1
The solder paste and PCB finish/plating must be 100% lead-free in order to ensure proper solderability.
11 ESS TECHNOLOGY, INC. 48401 Fremont Blvd., Fremont, CA 94538, USA Tel (510) 492-1088 • Fax (510) 492-1098
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ES9023.PDF ] | |
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