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PDF UMC2NT1G Data sheet ( Hoja de datos )
| Número de pieza | UMC2NT1G | |
| Descripción | Dual Common Base-Collector Bias Resistor Transistors | |
| Fabricantes | ON Semiconductor | |
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UMC2NT1G,
NSVUMC2NT1G,
UMC3NT1G,
NSVUMC3NT1G,
UMC5NT1G,
NSVUMC5NT2G
Dual Common
Base-Collector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the UMC2NT1G series, two
complementary BRT devices are housed in the SOT−353 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
AEC−Q101 Qualified and PPAP Capable
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant*
MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for
Q1 and Q2, − minus sign for Q1 (PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC 100 mAdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2011
December, 2011 − Rev. 10
1
http://onsemi.com
SC−88A/SOT−353
CASE 419A
STYLE 6
32
R1 R2
1
Q1
4
R2
R1
Q2
5
MARKING DIAGRAM
54
Ux M G
G
1 23
Ux = Device Marking
x = 2, 3 or 5
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
UMC2NT1/D
1 page  
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
TYPICAL ELECTRICAL CHARACTERISTICS — UMC2NT1G, NSVUMC2NT1G PNP TRANSISTOR
10
IC/IB = 10
1000
VCE = 10 V
1 25C
TA = -25C
100
75C
0.1
TA = 75C
25C
-25C
0.01
0
20 40
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) versus IC
10
50 1
10
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain
100
4 100
3
f = 1 MHz
lE = 0 mA
TA = 25C
75C 25C
TA = -25C
10
1
2
0.1
1
0.01
VO = 5 V
0
0 10
20
30
40 50 0.001 0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
VO = 0.2 V
TA = -25C
10 25C
75C
1
0.1
0
10
20 30 40 50
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
http://onsemi.com
5
5 Page 
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
G
5
S
4
−B−
12
3
D 5 PL
0.2 (0.008) M B M
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
INCHES
DIM MIN MAX
A 0.071 0.087
B 0.045 0.053
C 0.031 0.043
D 0.004 0.012
G 0.026 BSC
H --- 0.004
J 0.004 0.010
K 0.004 0.012
N 0.008 REF
S 0.079 0.087
MILLIMETERS
MIN MAX
1.80 2.20
1.15 1.35
0.80 1.10
0.10 0.30
0.65 BSC
--- 0.10
0.10 0.25
0.10 0.30
0.20 REF
2.00 2.20
J
STYLE 6:
PIN 1. EMITTER 2
C
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
HK
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.40
0.0157
0.65
0.025
1.9
0.0748
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
UMC2NT1/D
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet UMC2NT1G.PDF ] | |
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