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MC74HCT4051A の電気的特性と機能

MC74HCT4051AのメーカーはON Semiconductorです、この部品の機能は「Analog Multiplexers / Demultiplexers」です。


製品の詳細 ( Datasheet PDF )

部品番号 MC74HCT4051A
部品説明 Analog Multiplexers / Demultiplexers
メーカ ON Semiconductor
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MC74HCT4051A Datasheet, MC74HCT4051A PDF,ピン配置, 機能
MC74HCT4051A,
MC74HCT4052A,
MC74HCT4053A
Analog Multiplexers /
Demultiplexers with LSTTL
Compatible Inputs
HighPerformance SiliconGate CMOS
The MC74HCT4051A, MC74HCT4052A and MC74HCT4053A
utilize silicongate CMOS technology to achieve fast propagation
delays, low ON resistances, and low OFF leakage currents. These
analog multiplexers/demultiplexers control analog voltages that may
vary across the complete power supply range (from VCC to VEE).
The HCT4051A, HCT4052A and HCT4053A are identical in
pinout to the metalgate MC14051AB, MC14052AB and
MC14053AB. The ChannelSelect inputs determine which one of the
Analog Inputs/Outputs is to be connected, by means of an analog
switch, to the Common Output/Input. When the Enable pin is HIGH,
all analog switches are turned off.
The ChannelSelect and Enable inputs are compatible with standard
CMOS and LSTTL outputs.
These devices have been designed so that the ON resistance (Ron) is
more linear over input voltage than Ron of metalgate CMOS analog
switches.
For a multiplexer/demultiplexer with injection current protection,
see HC4851A and HCT4851A.
Features
Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Analog Power Supply Range (VCC VEE) = 2.0 to 12.0 V
Digital (Control) Power Supply Range (VCC GND) = 2.0 to 6.0 V
Improved Linearity and Lower ON Resistance Than MetalGate
Counterparts
Low Noise
In Compliance with the Requirements of JEDEC Standard No. 7 A
Chip Complexity: HCT4051A 184 FETs or 46 Equivalent Gates
HCT4052A 168 FETs or 42 Equivalent Gates
HCT4053A 156 FETs or 39 Equivalent Gates
These Devices are PbFree and are RoHS Compliant
16
1
16
1
16
1
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC16 WIDE
DW SUFFIX
CASE 751G
HCT405xA
AWLYWWG
1
16
SOIC16
D SUFFIX
CASE 751B
HCT405xAG
AWLYWW
1
TSSOP16
DT SUFFIX
CASE 948F
16
HCT40
5xA
ALYWG
G
1
x = 1, 2, 3
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
June, 2011 Rev. 2
1
Publication Order Number:
MC74HCT4051A/D

1 Page





MC74HCT4051A pdf, ピン配列
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
X0 12
X1 13
Y0 2
ANALOG
INPUTS/OUTPUTS
Y1 1
Z0 5
Z1 3
A 11
CHANNEL‐SELECT
INPUTS
B 10
C9
ENABLE 6
X SWITCH
Y SWITCH
Z SWITCH
14 X
15 Y
COMMON
OUTPUTS/INPUTS
4Z
FUNCTION TABLE MC74HCT4053A
Control Inputs
Enable
Select
CBA
ON Channels
L L L L Z0 Y0 X0
L L L H Z0 Y0 X1
L L H L Z0 Y1 X0
L L H H Z0 Y1 X1
L H L L Z1 Y0 X0
L H L H Z1 Y0 X1
L H H L Z1 Y1 X0
L H H H Z1 Y1 X1
H XXX
NONE
X = Don’t Care
PIN 16 = VCC
PIN 7 = VEE
PIN 8 = GND
VCC Y X X1 X0 A B
16 15 14 13 12 11 10
C
9
NOTE: This device allows independent control of each switch.
ChannelSelect Input A controls the XSwitch, Input B controls
the YSwitch and Input C controls the ZSwitch
Figure 5. Logic Diagram MC74HCT4053A
Triple SinglePole, DoublePosition Plus Common Off
12345678
Y1 Y0 Z1 Z Z0 Enable VEE GND
Figure 6. Pinout: MC74HCT4053A (Top View)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC Positive DC Supply Voltage (Referenced to GND)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Referenced to VEE)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVEE Negative DC Supply Voltage (Referenced to GND)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVIS Analog Input Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin Digital Input Voltage (Referenced to GND)
I DC Current, Into or Out of Any Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation in Still Air,
SOIC Package†
TSSOP Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg StorageTemperatureRange
Value
0.5 to +7.0
0.5 to +14.0
7.0 to +5.0
VEE 0.5 to
VCC + 0.5
0.5 to VCC + 0.5
±25
500
450
65 to +150
Unit
V
V
V
V
mA
mW
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
†Derating SOIC Package: 7 mW/°C from 65°C to 125°C
TSSOP Package: 6.1 mW/°C from 65°C to 125°C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
http://onsemi.com
3


3Pages


MC74HCT4051A 電子部品, 半導体
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
ADDITIONAL APPLICATION CHARACTERISTICS (GND = 0 V)
Symbol
BW
Parameter
Maximum OnChannel Bandwidth
or Minimum Frequency Response
(Figure 12)
Condition
fin = 1 MHz Sine Wave; Adjust fin Voltage
to Obtain 0 dBm at VOS; Increase fin
Frequency Until dB Meter Reads 3 dB;
RL = 50 W, CL = 10 pF
OffChannel Feedthrough
Isolation (Figure 13)
fin = Sine Wave; Adjust fin Voltage to
Obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 W, CL = 50 pF
fin = 1.0 MHz, RL = 50 W, CL = 10 pF
Feedthrough Noise.
Vin 1 MHz Square Wave (tr = tf = 6 ns);
ChannelSelect Input to Common Adjust RL at Setup so that IS = 0 A;
I/O (Figure 14)
Enable = GND RL = 600 W, CL = 50 pF
RL = 10 kW, CL = 10 pF
Crosstalk Between Any Two
fin = Sine Wave; Adjust fin Voltage to
Switches (Figure 18)
Obtain 0 dBm at VIS
(Test does not apply to HCT4051A)
fin = 10 kHz, RL = 600 W, CL = 50 pF
fin = 1.0 MHz, RL = 50 W, CL = 10 pF
THD
Total Harmonic Distortion
(Figure 20)
fin = 1 kHz, RL = 10 kW, CL = 50 pF
THD = THDmeasured THDsource
VIS = 4.0 VPP sine wave
VIS = 8.0 VPP sine wave
VIS = 11.0 VPP sine wave
*Limits not tested. Determined by design and verified by qualification.
VCC
V
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
VEE
V
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
Limit*
25°C
‘51 ‘52 ‘53
80 95 120
80 95 120
80 95 120
50
50
50
40
40
40
25
105
135
35
145
190
50
50
50
60
60
60
Unit
MHz
dB
mVPP
dB
%
0.10
0.08
0.05
300 180
160
250
140
200 120
125°C
125°C
100
150
25°C 80
100
- 55°C
60
25°C
40 - 55°C
50
20
0 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 2.0 2.25
0
0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 2.0 2.25 2.5 2.75 3.0
VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 7.
VIS, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE
Figure 7a. Typical On Resistance, VCC VEE = 2.0 V
Figure 7b. Typical On Resistance, VCC VEE = 3.0 V
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部品番号部品説明メーカ
MC74HCT4051A

Analog Multiplexers / Demultiplexers

ON Semiconductor
ON Semiconductor
MC74HCT4051A

Analog Multiplexers / Demultiplexers

ON Semiconductor
ON Semiconductor


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