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PDF PIC24HJ64GP502 Data sheet ( Hoja de datos )
| Número de pieza | PIC24HJ64GP502 | |
| Descripción | 16-bit Microcontrollers | |
| Fabricantes | Microchip | |
| Logotipo |  |
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PIC24HJ32GP302/304,
PIC24HJ64GPX02/X04 and
PIC24HJ128GPX02/X04
16-bit Microcontrollers
(up to 128 KB Flash and 8K SRAM) with Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
Clock Management
• 2% internal oscillator
• Programmable PLL and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Low-power management modes
• Fast wake-up and start-up
High-Efficiency Math Engine
• Single-cycle MUL plus hardware divide
Advanced Analog Features
• 10/12-bit ADC with 1.1Msps/500 ksps conversion
rate:
- Up to 13 ADC input channels and four S&H
- Flexible/Independent trigger sources
• 150 ns Comparators:
- Up to two Analog Comparator modules
- 4-bit DAC with two ranges for Analog Comparators
Input/Output
• Software remappable pin functions
• 5V-tolerant pins
• Selectable open drain and internal pull-ups
• Up to 5 mA overvoltage clamp current/pin
• Multiple external interrupts
Packages
Type
SPDIP
SOIC
Pin Count
28
28
I/O Pins
21
21
Contact Lead/Pitch
.100''
1.27
Dimensions
1.365x.285x.135''
17.9x7.50x2.05
Note: All dimensions are in millimeters (mm) unless specified.
System Peripherals
• Cyclic Redundancy Check (CRC) module
• Up to five 16-bit and up to two 32-bit Timers/
Counters
• Up to four Input Capture (IC) modules
• Up to four Output Compare (OC) modules
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• Parallel Master Port (PMP)
• Two UART modules (10 Mbps)
- Supports LIN 2.0 protocols
- RS-232, RS-485, and IrDA® support
• Two 4-wire SPI modules (15 Mbps)
• Enhanced CAN (ECAN) module (1 Mbaud) with
2.0B support
• I2C module (100K, 400K and 1Mbaud) with
SMBus support
Direct Memory Access (DMA)
• 8-channel hardware DMA with no CPU stalls or
overhead
• UART, SPI, ADC, ECAN, IC, OC, INT0
Qualification and Class B Support
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC)
• Class B Safety Library, IEC 60730, VDE certified
Debugger Development Support
• In-circuit and in-application programming
• Two program breakpoints
• Trace and run-time watch
QFN-S
28
21
0.65
6x6x0.9
QFN
44
35
0.65
8x8x0.9
TQFP
44
35
0.80
10x10x1
© 2007-2012 Microchip Technology Inc.
DS70293G-page 1
1 page  
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
Pin Diagrams (Continued)
44-Pin TQFP
Pins are up to 5V tolerant
AN4/C1IN-/RP2(1)/CN6/RB2
AN5/C1IN+/RP3(1)/CN7/RB3
AN6/RP16(1)/CN8/RC0
AN7/RP17(1)/CN9/RC1
AN8/CVREF/RP18(1)/PMA2/CN10/RC2
VDD
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/RA3
TDO/PMA8/RA8
SOSCI/RP4(1)/CN1/RB4
23 11
24 10
25
26 PIC24HJ32GP304
9
8
27 PIC24HJ64GP204 7
28 PIC24HJ64GP504 6
29 PIC24HJ128GP204 5
30 PIC24HJ128GP504 4
31 3
32 2
33 1
AN11/RP13(1)/CN13/PMRD/RB13
AN12/RP12(1)/CN14/PMD0/RB12
PGEC2/RP11(1)/CN15/PMD1/RB11
PGED2/EMCD2/RP10(1)/CN16/PMD2/RB10
VCAP(2)
VSS
RP25(1)/CN19/PMA6/RC9
RP24(1)/CN20/PMA5/RC8
RP23(1)/CN17/PMA0/RC7
RP22(1)/CN18/PMA1/RC6
SDA1/RP9(1)/CN21/PMD3/RB9
Note 1: The RPx pins can be used by any remappable peripheral. See Table 1 in this section for the list of available peripherals.
2: Refer to Section 2.3 “CPU Logic Filter Capacitor Connection (VCAP)” for proper connection to this pin.
© 2007-2012 Microchip Technology Inc.
DS70293G-page 5
5 Page 
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Type
Buffer
Type
PPS
Description
AN0-AN12
CLKI
CLKO
I Analog
Analog input channels.
I ST/CMOS No External clock source input. Always associated with OSC1 pin function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
O — No Always associated with OSC2 pin function.
OSC1
OSC2
SOSCI
SOSCO
I ST/CMOS No Oscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
I/O — No Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
I ST/CMOS No 32.768 kHz low-power oscillator crystal input; CMOS otherwise.
O — No 32.768 kHz low-power oscillator crystal output.
CN0-CN30
IC1-IC2
IC7-IC8
I ST No Change notification inputs. Can be software programmed for internal
weak pull-ups on all inputs.
I ST Yes Capture inputs 1/2
I ST Yes Capture inputs 7/8.
OCFA
OC1-OC4
INT0
INT1
INT2
RA0-RA4
RA7-RA10
I ST Yes Compare Fault A input (for Compare Channels 1, 2, 3 and 4).
O — Yes Compare outputs 1 through 4.
I ST No External interrupt 0.
I ST Yes External interrupt 1.
I ST Yes External interrupt 2.
I/O ST No PORTA is a bidirectional I/O port.
I/O ST No PORTA is a bidirectional I/O port.
RB0-RB15
RC0-RC9
T1CK
T2CK
T3CK
T4CK
T5CK
I/O ST No PORTB is a bidirectional I/O port.
I/O ST No PORTC is a bidirectional I/O port.
I ST No Timer1 external clock input.
I ST Yes Timer2 external clock input.
I ST Yes Timer3 external clock input.
I ST Yes Timer4 external clock input.
I ST Yes Timer5 external clock input.
U1CTS
U1RTS
U1RX
U1TX
I ST Yes UART1 clear to send.
O — Yes UART1 ready to send.
I ST Yes UART1 receive.
O — Yes UART1 transmit.
U2CTS
U2RTS
U2RX
U2TX
I ST Yes UART2 clear to send.
O — Yes UART2 ready to send.
I ST Yes UART2 receive.
O — Yes UART2 transmit.
SCK1
SDI1
SDO1
SS1
I/O ST Yes Synchronous serial clock input/output for SPI1.
I ST Yes SPI1 data in.
O — Yes SPI1 data out.
I/O ST Yes SPI1 slave synchronization or frame pulse I/O.
SCK2
SDI2
SDO2
SS2
Legend:
I/O ST Yes Synchronous serial clock input/output for SPI2.
I ST Yes SPI2 data in.
O — Yes SPI2 data out.
I/O ST Yes SPI2 slave synchronization or frame pulse I/O.
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
PPS = Peripheral Pin Select
Analog = Analog input
O = Output
TTL = TTL input buffer
P = Power
I = Input
© 2007-2012 Microchip Technology Inc.
DS70293G-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC24HJ64GP502.PDF ] | |
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