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PDF MT6011 Data sheet ( Hoja de datos )

Número de pieza MT6011
Descripción P-Channel Power MOSFET
Fabricantes MOS-TECH 
Logotipo MOS-TECH Logotipo



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No Preview Available ! MT6011 Hoja de datos, Descripción, Manual

MOS-TECH Semiconductor Co.,LTD
MT6011
60V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Mos-tech’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially t ailored to
minimize on-state resistance, provide superior swit ching
performance, and wit hstand a hi gh energy pulse in the
avalanche and com mutation modes. These devices are
well suited for low voltage applications such as automotive,
DC/DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
• -10A, -60V, RDS(on) = 0.07@VGS = -10 V
• Low gate charge ( typical 21 nC)
• Low Crss ( typical 80 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
GDS
TO-220
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
- Derate above 25°C
(Note 3)
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
G!
S
!
▶▲
!
D
MT6011
-60
-10
-7
-45
± 25
130
-17
7.9
-7.0
49
0.53
-55 to +175
300
Typ Max
-- 1.9
0.5 --
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W

1 page




MT6011 pdf
Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
-10V
Qg
VGS
VDS
Qgs Qgd
-3mA
DUT
Charge
Resistive Switching Test Circuit & Waveforms
-10V
VDS
VGS
RG
RL
VDD
DUT
td(on)
VGS 10%
t on
tr
VDS
90%
t off
td(off)
tf
-10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
L
VDS
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
ID
RG
VDD
VDD
ID (t)
VDS (t)
DUT
IAS
BVDSS
©2011 MOS-TECH Semiconductor Corporation
Rev. A2. 2011

5 Page










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