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HS-303CEH の電気的特性と機能

HS-303CEHのメーカーはIntersilです、この部品の機能は「Radiation Hardened BiCMOS Dual SPDT Analog Switch」です。


製品の詳細 ( Datasheet PDF )

部品番号 HS-303CEH
部品説明 Radiation Hardened BiCMOS Dual SPDT Analog Switch
メーカ Intersil
ロゴ Intersil ロゴ 




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HS-303CEH Datasheet, HS-303CEH PDF,ピン配置, 機能
DATASHEET
Radiation Hardened BiCMOS Dual SPDT Analog Switch
HS-303CEH
The HS-303CEH is an analog switch and a monolithic device
that is fabricated using Intersil’s dielectrically isolated
Radiation Hardened Silicon Gate (RSG) process technology to
insure latch-up free operation. It is pinout compatible and
functionally equivalent to the HS-303RH. This switch offers
low-resistance switching performance for analog voltages up
to the supply rails. ON-resistance is low and stays reasonably
constant over the full range of operating voltage and current.
ON-resistance also stays reasonably constant when exposed to
radiation. Break-before-make switching is controlled by 5V
digital inputs. The HS-303CEH can operate with rails of ±15V.
Specifications
The Detailed Electrical Specifications for the HS-303CEH is
contained in SMD 5962-95813.
Features
• QML, per MIL-PRF-38535
• No latch-up, dielectrically isolated device islands
• Pinout and functionally compatible with Intersil HS-303RH
series analog switches
• Analog signal range equal to the supply voltage range
• Low leakage . . . . . . . . . . . . . . . . . . . . . 150nA (max, post-rad)
• Low rON . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Ω (max, post-rad)
• Low standby supply current . . . . . . . ±150µA (max, post-rad)
• Radiation assurance
- High dose rate (50 to 300rad(Si)/s) . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . 50krad(Si)*
• Single event effects
- For LET = 60MeV-mg/cm2 at 60° incident angle,
<150pC charge transferred to the output of an off switch
* Product capability established by initial characterization. The
EH version is acceptance tested on a wafer-by-wafer basis to
50krad(Si) at low dose rate.
S
IN N P
D
LOGIC
0
1
FIGURE 1. LOGIC CIRCUIT
TABLE 1. TRUTH TABLE
SW1 AND SW2
SW3 AND SW4
OFF ON
ON OFF
16
14
12
10
8
6
4
2
0
10 11 12 13 14 15
NEGATIVE SUPPLY VOLTAGE (V-)
FIGURE 2. RECOMMENDED OPERATING AREA IN GREY
March 4, 2015
FN8399.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LLC 2012, 2013, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 Page





HS-303CEH pdf, ピン配列
HS-303CEH
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V
±VSUPPLY to Ground (V+, V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±17.5V
Analog Input Voltage
(+VS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+VSUPPLY +1.5V
(-VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VSUPPLY -1.5V
Digital Input Voltage
(+VA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +4V
(-VA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VSUPPLY -4V
Peak Current (S or D)
(Pulse at 1ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . 40mA
Continuous Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
Flatpack Package (Notes 3, 4) . . . . . . . . . .
105
17
Package Power Dissipation at 125°C
Flatpack Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.48W/°C
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Operating Supply Voltage Range (±VSUPPLY) . . . . . . . . . . . . . . . . . . . . ±15V
Analog Input Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY
Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 0.8V
Logic High Level (VAH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.0V to +VSUPPLY
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. For JC, the “case temp” location is the center of the package underside.
Electrical Specifications VSUPPLY = ±15V unless otherwise specified. Boldface limits apply across the operating temperature range,
-55°C to +125°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN MAX
(Note 7) TYP (Note 7) UNITS
+rDS(ON)
-rDS(ON)
+IS(OFF)
-IS(OFF)
+ID(OFF)
-ID(OFF)
+ID(ON)
“Switch On” Resistance
“Switch On” Resistance
Leakage Current into Source of an “OFF” Switch
Leakage Current into Source of an “OFF” Switch
Leakage Current into Drain of an “OFF” Switch
Leakage Current into Drain of an “OFF” Switch
Leakage Current from an “ON” Driver into the
Switch (Drain and Source)
VD = 10V, IS = -10mA
VD = -10V, IS = 10mA
VS = +14V, VD = -14V
VS = +15V, VD = -15V
VS = -14V, VD = +14V
VS = -15V, VD = +15V
VS = +14V, VD = -14V
VS = +15V, VD = -15V
VS = -14V, VD = +14V
VS = -15V, VD = +15V
VS = +14V, VD = +14V
-150
-20
-150
-20
-150
-20
-150
-20
-100
35
35
0.05
0.5
0.05
0.5
-0.1
75
75
150
20
150
20
150
20
150
20
100
Ω
Ω
nA
µA
nA
µA
nA
µA
nA
µA
nA
-ID(ON)
IAL
IAH
I+
Leakage Current from an “ON” Driver into the
Switch (Drain and Source)
Low Level Input Address Current
High Level Input Address Current
Positive Supply Current
I- Negative Supply Current
CIS(OFF) Switch Input Capacitance
VS = -14V, VD = -14V
All Channels VA = 0.8V
All Channels VA = 4.0V
All Channels VA = 0.8V
VA1 = 0V, VA2 = 4V
VA1 = 4V, VA2 = 0V
All Channels VA = 0.8V
VA1 = 0V, VA2 = 4V
VA1 = 4V, VA2 = 0V
From Source to GND (Notes 5, 6)
-100 0.01 100
-1000
-1000
0.03
0.03
45
0.15
1000
1000
150
0.6
nA
nA
nA
µA
mA
-0.1 -100
-0.1 -100
µA
µA
28 pF
CC1 Driver Input Capacitance
CC2 Driver Input Capacitance
VA = 0V (Notes 5, 6)
VA = 15V (Notes 5, 6)
10 pF
10 pF
Submit Document Feedback
3
FN8399.3
March 4, 2015


3Pages


HS-303CEH 電子部品, 半導体
HS-303CEH
300
500
450
33
25°C
TEST CONDITIONS
LOGIC
MIN TYP
MAX
UNITS
15
300
500
TRUTH TABLE
450
FIGURE 3S.WS1WAITNCDHSINWG2TEST CIRSCWU33I3TAND SW4
FIGURE 4. SWITCHING TEST CIRCUIT WAVEFORM
W4
FIGURE 5. BREAK-BEFORE-MAKE TEST CIRCUIT
FIGURE 6. BREAK-BEFORE-MAKE TEST CIRCUIT WAVEFORMS
Submit Document Feedback
6
FN8399.3
March 4, 2015

6 Page



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部品番号部品説明メーカ
HS-303CEH

Radiation Hardened BiCMOS Dual SPDT Analog Switch

Intersil
Intersil


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