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ISL97519A の電気的特性と機能

ISL97519AのメーカーはIntersilです、この部品の機能は「600kHz/1.2MHz PWM Step-Up Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL97519A
部品説明 600kHz/1.2MHz PWM Step-Up Regulator
メーカ Intersil
ロゴ Intersil ロゴ 




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ISL97519A Datasheet, ISL97519A PDF,ピン配置, 機能
600kHz/1.2MHz PWM Step-Up Regulator
ISL97519A
The ISL97519A is a high frequency, high efficiency step-up
voltage regulator operated at constant frequency PWM mode.
With an internal 2.0A, 200mΩ MOSFET, it can deliver up to 1A
output current at over 90% efficiency. Two selectable
frequencies, 600kHz and 1.2MHz, allow trade offs between
smaller components and faster transient response. An
external compensation pin gives the user greater flexibility in
setting frequency compensation allowing the use of low ESR
Ceramic output capacitors.
When shut down, it draws <1µA of current and can operate
down to 2.3V input supply. These features, along with 1.2MHz
switching frequency, make it an ideal device for portable
equipment and TFT-LCD displays.
The ISL97519A is available in an 8 Ld MSOP package with a
maximum height of 1.1mm. The device is specified for
operation over the full -40°C to +85°C temperature range.
Features
• >90% Efficiency
• 2.0A, 200mΩ Power MOSFET
• 2.3V to 5.5V Input
• 1.1*VIN up to 25V Output
• 600kHz/1.2MHz Switching Frequency Selection
• Adjustable Soft-Start
• Internal Thermal Protection
• 1.1mm Max Height 8 Ld MSOP Package
• Pb-Free (RoHS compliant)
• Halogen Free
Applications
• TFT-LCD displays
• DSL modems
• PCMCIA cards
• Digital cameras
• GSM/CDMA phones
• Portable equipment
• Handheld devices
VDD
REFERENCE
GENERATOR
FSEL
OSCILLATOR
EN SS
SHUTDOWN
AND START-UP
CONTROL
COMPARATOR
PWM LOGIC
CONTROLLER
CURRENT
SENSE
GM
AMPLIFIER
FET
DRIVER
LX
GND
FB
COMP
February 16, 2012
FN6683.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2008, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL97519A pdf, ピン配列
ISL97519A
Absolute Maximum Ratings (TA = +25°C)
LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
COMP, FB, EN, SS, FSEL to GND . . . . . . . . . . . . . . . . . . -0.3V to (VDD +0.3V)
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves on page 5
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications VIN = 3.3V, VOUT = 12V, IOUT = 0mA, FSEL = GND, TA = -40°C to +85°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
DESCRIPTION
CONDITIONS
MIN MAX
(Note 4) TYP (Note 4) UNIT
IQ1 Quiescent Current - Shutdown
EN = 0V
1 5 µA
IQ2
IQ3
VFB
IB-FB
VDD
DMAX-600kHz
DMAX-1.2MHz
ILIM1
ILIM2
IEN
rDS(ON)
ILX-LEAK
ΔVOUT/ΔVIN
ΔVOUT/ΔIOUT
FOSC1
FOSC2
VIL
VIH
GM
VDD-ON
HYS
ISS
VSS-en
ILIM-VSS-en
OTP
Quiescent Current - Not Switching
Quiescent Current - Switching
Feedback Voltage
Feedback Input Bias Current
Input Voltage Range
Maximum Duty Cycle
Maximum Duty Cycle
Current Limit - Max Peak Input Current
Current Limit - Max Peak Input Current
Shutdown Input Bias Current
Switch ON-Resistance
Switch Leakage Current
Line Regulation
Load Regulation
Switching Frequency Accuracy
Switching Frequency Accuracy
EN, FSEL Input Low Level
EN, FSEL Input High Level
Error Amp Tranconductance
VDD UVLO On Threshold
VDD UVLO Hysteresis
Soft-Start Charge Current
Minimum Soft-Start Enable Voltage
Current Limit Around SS Enable V
Over-Temperature Protection
EN = VDD, FB = 1.3V
EN = VDD, FB = 1.0V
FSEL = 0V
FSEL = VDD
VDD < 2.8V
VDD > 2.8V
EN = 0V
VDD = 2.7V, ILX = 1A
VSW = 27V
3V < VIN < 5.5V, VOUT = 12V
VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA
FSEL = 0V
FSEL = VDD
ΔI = 5µA
SS = 200mV
1.228
2.3
85
85
1.5
500
1000
1.5
70
1.95
2
40
300
0.7
3
1.24
0.01
92
90
1.0
2.0
0.01
0.2
0.01
0.2
0.3
620
1250
130
2.1
140
3
65
350
150
4.5
1.252
0.5
5.5
0.5
3
740
1500
0.5
150
2.25
4
150
400
mA
mA
V
µA
V
%
%
A
A
µA
Ω
µA
%
%
kHz
kHz
V
V
1µ/Ω
V
mV
µA
mV
mA
°C
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
3 FN6683.3
February 16, 2012


3Pages


ISL97519A 電子部品, 半導体
ISL97519A
During the second cycle, the power FET turns off and the
Schottky diode is forward biased, (see Figure 13). The energy
stored in the inductor is pumped to the output supplying
output current and charging the output capacitor. The Schottky
diode side of the inductor is clamped to a Schottky diode
above the output voltage. So the voltage drop across the
inductor is VIN - VOUT. The change in inductor current during the
second cycle is shown in Equation 2:
ΔIL = ΔT2 × V----I--N-----–--L--V----O---U----T-
ΔT2 = 1--F---S-–--W--D--
(EQ. 2)
For stable operation, the same amount of energy stored in the
inductor must be taken out. The change in inductor current
during the two cycles must be the same, as shown in
Equation 3.
ΔI1 + ΔI2 = 0
F----SD---W--- × -V--L-I--N-- + 1-F----S-–--W--D-- × V----I--N-----–--L--V----O---U----T- = 0
-V--V-O--I--UN---T- = 1------1–----D--
(EQ. 3)
VIN
CIN
LD
ISL97519A
COUT
VOUT
FIGURE 11. BOOST CONVERTER
VIN
CIN
L
ISL97519A
COUT
VOUT
IL ΔIL1
ΔT1
ΔVO
FIGURE 12. BOOST CONVERTER - CYCLE 1, POWER SWITCH
CLOSE
VIN
CIN
LD
ISL97519A
COUT
VOUT
ΔIL2
IL
ΔT2
ΔVO
FIGURE 13. BOOST CONVERTER - CYCLE 2, POWER SWITCH
OPEN
Output Voltage
An external feedback resistor divider is required to divide the
output voltage down to the nominal 1.24V reference voltage.
The current drawn by the resistor network should be limited to
maintain the overall converter efficiency. The maximum value
of the resistor network is limited by the feedback input bias
current and the potential for noise being coupled into the
feedback pin. A resistor network less than 100k is
recommended. The boost converter output voltage is
determined by the relationship in Equation 4:
VOUT
=
VFB
×
1
+
R-R----12-⎠⎟⎞
(EQ. 4)
The nominal VFB voltage is 1.24V.
Inductor Selection
The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency. Its
selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
regulator.The peak inductor current can be calculated in
Equation 5:
IL(PEAK) = I--O----U----T--V--×-I--N--V---O----U---T- + 1 2 × -V-L--I--N-×----×-V---O(---V-U--O-T---U-×---T--F--–--R--V--E--I--NQ---)-
(EQ. 5)
Output Capacitor
Low ESR capacitors should be used to minimized the output
voltage ripple. Multi-layer ceramic capacitors (X5R and X7R)
are preferred for the output capacitors because of their lower
ESR and small packages. Tantalum capacitors with higher ESR
can also be used. The output ripple can be calculated as shown
in Equation 6:
ΔVO = -F-I--OS---W-U---T--×--×---C--D--O-- + IOUT × ESR
(EQ. 6)
For noise sensitive application, a 0.1µF placed in parallel with
the larger output capacitor is recommended to reduce the
switching noise coupled from the LX switching node.
6 FN6683.3
February 16, 2012

6 Page



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部品番号部品説明メーカ
ISL97519

600kHz/1.2MHz PWM Step-Up Regulator

Intersil
Intersil
ISL97519A

600kHz/1.2MHz PWM Step-Up Regulator

Intersil
Intersil


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