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PDF CYRF69313 Data sheet ( Hoja de datos )
| Número de pieza | CYRF69313 | |
| Descripción | Programmable Radio-on-Chip LPstar | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CYRF69313
Programmable Radio-on-Chip LPstar
Programmable Radio-on-Chip LPstar
Features
■ Radio System-on-Chip, with built-in 8-bit MCU in a single
device.
■ Operates in the unlicensed worldwide Industrial, Scientific, and
Medical (ISM) band (2.400 GHz to 2.483 GHz).
■ On Air compatible with second generation radio
WirelessUSB™ LP and PRoC LP.
■ Pin-to-pin compatible with PRoC LP except the pin 31 and
pin 37.
Intelligent
■ M8C based 8-bit CPU, optimized for human interface devices
(HID) applications
■ 256 bytes of SRAM
■ 8 Kbytes of flash memory with EEPROM emulation
■ In-System reprogrammable through D+/D– pins
■ CPU speed up to 12 MHz
■ 16-bit free running timer
■ Low power wakeup timer
■ 12-bit programmable interval timer with interrupts
■ Watchdog timer
Low Power
■ 21 mA operating current (Transmit at –5 dBm)
■ Sleep current less than 1 µA
■ Operating voltage from 4.0 V to 5.25 V DC
■ Fast startup and fast channel changes
■ Supports coin-cell operated applications
Reliable and Robust
■ Receive sensitivity typical –90 dBm
■ AutoRate™ – dynamic data rate reception
❐ Enables data reception for any of the supported bit rates
automatically.
❐ DSSS (250 Kbps), GFSK (1 Mbps)
■ Operating temperature from 0 °C to 70 °C
■ Closed-loop frequency synthesis for minimal frequency drift
Simple Development
■ Auto transaction sequencer (ATS): MCU can stay sleeping
longer to save power
■ Framing, length, CRC16, and Auto ACK
■ Separate 16 byte transmit and receive FIFOs
■ Receive signal strength indication (RSSI)
■ Built-in serial peripheral interface (SPI) control while in sleep
mode
■ Advanced development tools based on Cypress’s PSoC® Tools
■ Flexible I/O
■ 2 mA source current on all GPIO pins. Configurable 8 mA or
50 mA/pin current sink on designated pins
■ Each GPIO pin supports high impedance inputs, configurable
pull-up, open-drain output, CMOS/TTL inputs, and CMOS
output
■ Maskable interrupts on all I/O pins
BOM Savings
■ Low external component count
■ Small footprint 40-pin QFN (6 mm × 6 mm)
■ GPIOs that require no external components
■ Operates off a single crystal
■ Integrated 3.3 V regulator
■ Integrated pull-up on D–
USB Specification Compliance
■ Conforms to USB specification version 2.0
■ Conforms to USB HID specification version 1.1
■ Supports one low speed USB device address
■ Supports one control endpoint and two data end points
■ Integrated USB transceiver
Applications
■ Wireless keyboards and mice
■ Presentation tools
■ Wireless gamepads
■ Remote controls
■ Toys
■ Fitness
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-66503 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 21, 2014
1 page  
CYRF69313
Functional Description
PRoC LPstar devices are integrated radio and microcontroller
functions in the same package to provide a dual role single-chip
solution.
Communication between the microcontroller and the radio is via
the SPI interface between both functions.
Functional Overview
The CYRF69313 is a complete Radio System-on-Chip device,
providing a complete RF system solution with a single device and
a few discrete components. The CYRF69313 is designed to
implement low cost wireless systems operating in the worldwide
2.4 GHz Industrial, Scientific, and Medical (ISM) frequency band
(2.400 GHz–2.4835 GHz).
2.4 GHz Radio Function
The SoC contains a 2.4 GHz, 1 Mbps GFSK radio transceiver,
packet data buffering, packet framer, DSSS baseband controller,
Received Signal Strength Indication (RSSI), and SPI interface
for data transfer and device configuration.
The radio supports 98 discrete 1 MHz channels (regulations may
limit the use of some of these channels in certain jurisdictions).
The baseband performs DSSS spreading/despreading, Start of
Packet (SOP), End of Packet (EOP) detection, and CRC16
generation and checking. The baseband may also be configured
to automatically transmit Acknowledge (ACK) handshake
packets whenever a valid packet is received.
When in receive mode, with packet framing enabled, the device
is always ready to receive data transmitted at any of the
supported bit rates. This enables the implementation of
mixed-rate systems in which different devices use different data
rates. This also enables the implementation of dynamic data rate
systems that use high data rates at shorter distances or in a
low-moderate interference environment or both. It changes to
lower data rates at longer distances or in high interference
environments or both.
USB Microcontroller Function
The microcontroller function is based on the powerful
CYRF69313 microcontroller. It is an 8-bit Flash programmable
microcontroller with integrated low speed USB interface.
The microcontroller has up to 14 GPIO pins to support USB,
PS/2 and other applications. Each GPIO port supports high
impedance inputs, configurable pull-up, open drain output,
CMOS/TTL inputs and CMOS output. Up to two pins support
programmable drive strength of up to 50 mA. Additionally each
I/O pin can be used to generate a GPIO interrupt to the
microcontroller. Each GPIO port has its own GPIO interrupt
vector with the exception of GPIO Port 0.
The microcontroller features an internal oscillator. With the
presence of USB traffic, the internal oscillator can be set to
precisely tune to USB timing requirements (24 MHz ± 1.5%).
The PRoC LPstar has up to 8 Kbytes of Flash for user’s firmware
code and up to 256 bytes of RAM for stack space and user
variables.
Backward Compatibility
The CYRF69313 IC is fully interoperable with the main modes
of the second generation Cypress radio SoC namely the
CYRF6936, CYRF69103 and CYRF69213.
CYRF69313 IC device may transmit data to or receive data from
a second generation device, or both.
Document Number: 001-66503 Rev. *E
Page 5 of 81
5 Page 
CYRF69313
Figure 4. Three-Wire SPI Mode
MCU Function
Radio Function
P1.5/MOSI
MOSI
MOSI/MISO multiplexed
on one MOSI pin
P1.4/SCK
SCK
P1.3/nSS
nSS
Four-Wire SPI Interface
The four-wire SPI communications interface consists of MOSI,
MISO, SCK, and SS.
The device receives SCK from the MCU function on the SCK pin.
Data from the MCU function is shifted in on the MOSI pin. Data
to the MCU function is shifted out on the MISO pin. The active
low SS pin must be asserted for the two functions to
communicate. The IRQ function may be optionally multiplexed
with the MOSI pin; when this option is enabled the IRQ function
is not available while the SS pin is low. When using this
configuration, user firmware should ensure that the MOSI
function on MCU function is in a high impedance state whenever
SS is high.
Figure 5. Four-Wire SPI Mode
MCU Function
P1.6/MISO
P1.5/MOSI
P1.4/SCK
Radio Function
MOSI
SCK
MISO
SPI Communication and Transactions
The SPI transactions can be single byte or multi-byte. The MCU
function initiates a data transfer through a Command/Address
byte. The following bytes are data bytes. The SPI transaction
format is shown in Table 2 on page 12.
The DIR bit specifies the direction of data transfer. 0 = Master
reads from slave. 1 = Master writes to slave.
The INC bit helps to read or write consecutive bytes from
contiguous memory locations in a single burst mode operation.
If Slave Select is asserted and INC = 1, then the master MCU
function reads a byte from the radio, the address is incremented
by a byte location, and then the byte at that location is read, and
so on. If Slave Select is asserted and INC = 0, then the MCU
function reads/writes the bytes in the same register in burst
mode, but if it is a register file then it reads/writes the bytes in
that register file.
The SPI interface between the radio function and the MCU is not
dependent on the internal 12 MHz oscillator of the radio.
Therefore, radio function registers can be read from or written
into while the radio is in sleep mode.
SPI I/O Voltage References
The SPI interfaces between MCU function and the radio and the
IRQ and RST have a separate voltage reference VIO, enabling
the radio function to directly interface with the MCU function,
which operates at higher supply voltage. The internal SPIO pins
between the MCU function and radio function should be
connected with a regulated voltage of 3.3 V (by setting [bit4] of
Registers P13CR, P14CR, P15CR, and P16CR of the MCU
function) and the internal 3.3 V regulator of the MCU function
should be turned on.
SPI Connects to External Devices
The three SPI wires, MOSI, SCK, and SS are also drawn out of
the package as external pins to allow the user to interface their
own external devices (such as optical sensors and others)
through SPI. The radio function also has its own SPI wires MISO
and IRQ, which can be used to send data back to the MCU
function or send an interrupt request to the MCU function. They
can also be configured as GPIO pins.
P1.3/nSS
nSS
This connection is external to the PRoC LPstar Chip
Document Number: 001-66503 Rev. *E
Page 11 of 81
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CYRF69313.PDF ] | |
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