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PDF CY7C60123 Data sheet ( Hoja de datos )
| Número de pieza | CY7C60123 | |
| Descripción | Low-Voltage Microcontroller | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY7C601xx/CY7C602xx
enCoRe™ II Low-Voltage Microcontroller
1. Features
■ enCoRe II low-voltage (enCoRe II LV) – enhanced
component reduction
❐ Internal crystalless oscillator with support for optional
external clock or external crystal or resonator
❐ Configurable I/O for real world interface without external
components
■ Enhanced 8-bit microcontroller
❐ Harvard architecture
❐ M8C CPU speed up to 12 MHz or sourced by an external
crystal, resonator, or clock signal
■ Internal memory
❐ 256 bytes of random access memory (RAM)
❐ 8 KB of flash including electrically erasable read only memory
(EEROM) emulation
■ Low power consumption
❐ Typically 2.25 mA at 3 MHz
❐ 5 A sleep
■ In-system reprogrammability
❐ Enables easy firmware update
■ General-purpose I/O (GPIO) ports
❐ Up to 36 GPIO pins
❐ 2-mA source current on all GPIO pins
❐ Configurable 8 or 50 mA per pin current sink on designated
pins
❐ Each GPIO port supports high-impedance inputs,
configurable pull-up, open drain output, complementary
metal oxide semiconductor (CMOS), and
transistor-transistor logic (TTL) inputs, and CMOS output
❐ Maskable interrupts on all I/O pins
2. Logic Block Diagram
■ SPI serial communication
❐ Master or slave operation
❐ Configurable up to 2 Mbit per second transfers
❐ Supports half-duplex single-data line mode for optical
sensors
■ 2-channel 8-bit or 1-channel 16-bit capture timer registers,
which store both rising and falling edge times
❐ Two registers each for two input pins
❐ Separate registers for rising and falling edge capture
❐ Simplifies interface to radio frequency (RF) inputs for wireless
applications
■ Internal low-power wakeup timer during suspend mode
❐ Periodic wakeup with no external components
■ Programmable interval timer interrupts
■ Reduced RF emissions at 27 MHz and 96 MHz
■ Watchdog timer (WDT)
■ Low-voltage detection (LVD) with user-selectable threshold
voltages
■ Improved output drivers to reduce electromagnetic interference
(EMI)
■ Operating voltage from 2.7 V to 3.6 V DC
■ Operating temperature from 0 °C to 70 °C
■ Available in 40-pin plastic dual inline package (PDIP), 24-pin
small outline integrated circuit (SOIC), 24-pin quad small
outline package (QSOP) and shrink small outline package
(SSOP), 48-pin SSOP
■ Advanced development tools based on Cypress PSoC® tools
■ Industry-standard programmer support
Interrupt
Control
4 SPI/GPIO
Pins
16 Extended
I/O Pins
16 GPIO
Pins
Wakeup
Timer
Internal
12 MHz
Oscillator
Clock
Control
Crystal
Oscillator
CY7C601xx only
POR /
Low-Voltage
Detect
M8C CPU
Watchdog
Timer
RAM
256 Byte
Flash
8 KB
12-bit Timer
Capture
Timers
Cypress Semiconductor Corporation
Document Number: 38-16016 Rev. *K
•198 Champion Court
•San Jose, CA 95134-1709
•408-943-2600
Revised September 11, 2014
1 page  
CY7C601xx/CY7C602xx
7.1 Pin Assignments
Table 7-1. Pin Assignments
48
SSOP
7
6
42
43
40
PDIP
3
2
38
39
24
QSOP
–
–
–
–
24
SOIC
–
–
–
–
Name
P4.0
P4.1
P4.2
P4.3
Description
GPIO port 4—configured as a group (nibble)
34 30 19 18 P3.0
35 31 20 19 P3.1
36 32
–
– P3.2
37 33
–
– P3.3
38 34
–
– P3.4
39 35
–
– P3.5
40 36
–
– P3.6
41 37
–
– P3.7
GPIO port 3—configured as a group (byte)
15 11 11 11 P2.0
14 10 10 10 P2.1
13 9 – – P2.2
12 8 – – P2.3
11 7 – – P2.4
10 6 – – P2.5
9 5 – – P2.6
8 4 – – P2.7
GPIO port 2—configured as a group (byte)
25 21 14 13 P1.0
GPIO port 1 bit 0/ISSP-SCLK
If this pin is used as a general-purpose output it draws current. It is, therefore,
configured as an input to reduce current draw.
26 22 15 14 P1.1
GPIO port 1 bit 1/ISSP-SDATA
If this pin is used as a general-purpose output it draws current. It is, therefore,
configured as an input to reduce current draw.
28 24 17 16 P1.2
GPIO port 1 bit 2
29 25 18 17 P1.3/SSEL GPIO port 1 bit 3—Configured individually
Alternate function is SSEL signal of the SPI bus.
30 26 21 20 P1.4/SCLK GPIO port 1 bit 4—Configured individually
Alternate function is SCLK signal of the SPI bus.
31 27 22 21 P1.5/SMOSI GPIO port 1 bit 5—Configured individually
Alternate function is SMOSI signal of the SPI bus.
32 28 23 22 P1.6/SMISO GPIO port 1 bit 6—Configured individually
Alternate function is SMISO signal of the SPI bus.
33 29 24 23 P1.7
GPIO port 1 bit 7—Configured individually
TTL voltage threshold.
23 19
9
9 P0.0/CLKIN
GPIO port 0 bit 0—Configured individually
On CY7C601xx, optional Clock In when external oscillator is disabled or external
oscillator input when external oscillator is enabled.
On CY7C602xx, oscillator input when configured as Clock In.
Document Number: 38-16016 Rev. *K
Page 5 of 69
5 Page 
CY7C601xx/CY7C602xx
10.2 Addressing Modes
10.2.1 Source Immediate
The result of an instruction using this addressing mode is placed
in the A register, the F register, the SP register, or the X register,
which is specified as part of the instruction opcode. Operand 1
is an immediate value that serves as a source for the instruction.
Arithmetic instructions require two sources; the second source is
the A, X, SP, or F register specified in the opcode. Instructions
using this addressing mode are two bytes in length.
Table 10-7. Source Immediate
Opcode
Instruction
Operand 1
Immediate value
Examples
ADD A, 7
MOV X, 8
AND F, 9
;In this case, the immediate value of 7 is added
with the accumulator and the result is placed in
the accumulator.
;In this case, the immediate value of 8 is moved
to the X register.
;In this case, the immediate value of 9 is logically
ANDed with the F register and the result is placed
in the F register.
10.2.2 Source Direct
The result of an instruction using this addressing mode is placed
in either the A register or the X register, which is specified as part
of the instruction opcode. Operand 1 is an address that points to
a location in either the RAM memory space or the register space
that is the source for the instruction. Arithmetic instructions
require two sources; the second source is the A register or X
register specified in the opcode. Instructions using this
addressing mode are two bytes in length.
Table 10-8. Source Direct
Opcode
Instruction
Operand 1
Source address
Examples
ADD A,
MOV X,
[7]
REG[8]
;In this case, the value in the RAM
memory location at address 7 is added
with the accumulator, and the result is
placed in the accumulator.
;In this case, the value in the register
space at address 8 is moved to the X
register.
10.2.3 Source Indexed
The result of an instruction using this addressing mode is placed
in either the A register or the X register, which is specified as part
of the instruction opcode. Operand 1 is added to the X register
forming an address that points to a location in either the RAM
memory space or the register space that is the source for the
instruction. Arithmetic instructions require two sources; the
second source is the A register or X register specified in the
opcode. Instructions using this addressing mode are two bytes
in length.
Table 10-9. Source Indexed
Opcode
Instruction
Operand 1
Source index
Examples
ADD A, [X+7]
MOV X, REG[X+8]
;In this case, the value in the memory
location at address X + 7 is added with
the accumulator, and the result is
placed in the accumulator.
;In this case, the value in the register
space at address X + 8 is moved to the
X register.
10.2.4 Destination Direct
The result of an instruction using this addressing mode is placed
within either the RAM memory space or the register space.
Operand 1 is an address that points to the location of the result.
The source for the instruction is either the A register or the X
register, which is specified as part of the instruction opcode.
Arithmetic instructions require two sources; the second source is
the location specified by Operand 1. Instructions using this
addressing mode are two bytes in length.
Table 10-10. Destination Direct
Opcode
Instruction
Operand 1
Destination address
Examples
ADD [7],
A
MOV REG[8], A
;In this case, the value in the memory
location at address 7 is added with the
accumulator, and the result is placed
in the memory location at address 7.
The accumulator is unchanged.
;In this case, the accumulator is
moved to the register space location at
address 8. The accumulator is
unchanged.
Document Number: 38-16016 Rev. *K
Page 11 of 69
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CY7C60123.PDF ] | |
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