CY7C63833 PDF Data sheet ( 特性 )

部品番号 CY7C63833
部品説明 Low-Speed USB Peripheral Controller
メーカ Cypress Semiconductor
ロゴ Cypress Semiconductor ロゴ 

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CY7C63833 Datasheet, CY7C63833 PDF,ピン配置, 機能
enCoRe™ II
Low-Speed USB Peripheral Controller
1.0 Features
• enCoReTM II USB—“enhanced Component Reduction”
— Crystalless oscillator with support for an external clock.
The internal oscillator eliminates the need for an external
crystal or resonator
— Two internal 3.3V regulators and internal USB pull-up
— Configurable IO for real-world interface without external
• USB Specification Compliance
— Conforms to USB Specification, Version 2.0
— Conforms to USB HID Specification, Version 1.1
— Supports one Low-Speed USB device address
— Supports one control endpoint and two data endpoints
— Integrated USB transceiver with dedicated 3.3V
regulator for USB signalling and D- pull up.
• Enhanced 8-bit microcontroller
— Harvard architecture
— M8C CPU speed can be up to 24 MHz or sourced by an
external clock signal
• Internal memory
— Up to 256 bytes of RAM
— Up to eight Kbytes of Flash including EEROM emulation
• Interface can autoconfigure to operate as PS/2 or USB
— No external components for switching between PS/2 and
USB modes
— No GPIO pins needed to manage dual-mode capability
• Low power consumption
— Typically 10 mA at 6 MHz
— 10 µA sleep
• In-system re-programmability
— Allows easy firmware update
• General purpose I/O ports
— Up to 20 General Purpose I/O (GPIO) pins
— High current drive on GPIO pins. Configurable 8- or 50-
mA/pin current sink on designated pins
— Each GPIO port supports high-impedance inputs,
configurable pull up, open drain output, CMOS/TTL
inputs, and CMOS output
— Maskable interrupts on all I/O pins
• A dedicated 3.3V regulator for the USB PHY. Aids in
signalling and D-line pull-up
• 125 mA 3.3V voltage regulator can power external 3.3V
• 3.3V I/O pins
— 4 I/O pins with 3.3V logic levels
— Each 3.3V pin supports high-impedance input, internal
pull up, open drain output or traditional CMOS output
• SPI serial communication
— Master or slave operation
— Configurable up to 4 Mbit/second transfers in the master
— Supports half duplex single data line mode for optical
• 2-channel 8-bit or 1-channel 16-bit capture timer registers.
Capture timer registers store both rising and falling edge
— Two registers each for two input pins
— Separate registers for rising and falling edge capture
— Simplifies interface to RF inputs for wireless applications
• Internal low-power wake-up timer during suspend mode
— Periodic wake-up with no external components
• 12-bit Programmable Interval Timer with interrupts
• Advanced development tools based on Cypress
MicroSystems PSoC™ tools
• Watchdog timer (WDT)
• Low-voltage detection with user-configurable threshold
• Operating voltage from 4.0V to 5.5VDC
• Operating temperature from 0–70°C
• Available in 16/18-pin PDIP, 16/18/24-pin SOIC, 24-pin
QSOP and 32-lead QFN packages
• Industry standard programmer support
1.1 Applications
The CY7C63310/CY7C638xx is targeted for the following
• PC HID devices
— Mice (optomechanical, optical, trackball)
• Gaming
— Joysticks
— Game pad
• General-purpose
— Barcode scanners
— POS terminal
— Consumer electronics
— Toys
— Remote controls
— Security dongles
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document 38-08035 Rev. *I
Revised September 26, 2006
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Low-Speed USB Peripheral Controller

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