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ADP5075 の電気的特性と機能

ADP5075のメーカーはAnalog Devicesです、この部品の機能は「DC-to-DC Inverting Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADP5075
部品説明 DC-to-DC Inverting Regulator
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADP5075 Datasheet, ADP5075 PDF,ピン配置, 機能
Data Sheet
800 mA, DC-to-DC Inverting Regulator
ADP5075
FEATURES
Wide input voltage range: 2.85 V to 15 V
Adjustable negative output to VIN − 39 V
Integrated 800 mA main switch
1.2 MHz/2.4 MHz switching frequency with optional external
frequency synchronization from 1.0 MHz to 2.6 MHz
Resistor programmable soft start timer
Slew rate control for lower system noise
Precision enable control
UVLO, OCP, OVP, and TSD protection
1.61 mm × 2.18 mm, 12-ball WLCSP
−40°C to +125°C junction temperature range
Supported by the ADIsimPower tool set
APPLICATIONS
Bipolar amplifiers, analog-to-digital converters (ADCs),
digital-to-analog converters (DACs), and multiplexers
Charge coupled device (CCD) bias supplies
Optical module supplies
Radio frequency (RF) power amplifier (PA) bias
GENERAL DESCRIPTION
The ADP5075 is a high performance dc-to-dc inverting regulator
used to generate negative supply rails.
The input voltage range of 2.85 V to 15 V supports a wide variety of
applications. The integrated main switch enables the generation of
an adjustable negative output voltage down to 39 V below the input
voltage.
The ADP5075 operates at a pin selected 1.2 MHz/2.4 MHz
switching frequency. The ADP5075 can synchronize with an
external oscillator from 1.0 MHz to 2.6 MHz to ease noise
filtering in sensitive applications. The regulator implements
programmable slew rate control circuitry for the MOSFET
driver stage to reduce electromagnetic interference (EMI).
The ADP5075 includes a fixed internal or resistor programmable
soft start timer to prevent inrush current at power-up. During
shutdown, the regulator completely disconnects the load from the
input supply to provide a true shutdown.
TYPICAL APPLICATION CIRCUIT
VIN
CIN
ON
OFF
RC
CC
CVREG
AVIN
PVIN
VREF
ADP5075 FB
EN
SS SW
COMP
SLEW
VREG SYNC/FREQ
GND
CVREF
RFB
RFT
D1
L1
VOUT
COUT
Figure 1.
Other key safety features in the ADP5075 include overcurrent
protection (OCP), overvoltage protection (OVP), thermal
shutdown (TSD), and input undervoltage lockout (UVLO).
The ADP5075 is available in a 12-ball WLCSP and is rated for a
−40°C to +125°C junction temperature range.
Table 1. Related Devices
Device
Boost
Switch (A)
Inverter
Switch (A)
ADP5070 1.0
0.6
ADP5071 2.0
1.2
ADP5075 Not
applicable
0.8
Package
20-lead LFCSP (4 mm ×
4 mm) and 20-lead TSSOP
20-lead LFCSP (4 mm ×
4 mm) and 20-lead TSSOP
12-ball WLCSP
(1.61 mm × 2.18 mm)
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 Page





ADP5075 pdf, ピン配列
ADP5075
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Typical Application Circuit ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 11
PWM Mode................................................................................. 11
PSM Mode ................................................................................... 11
Undervoltage Lockout (UVLO) ............................................... 11
Oscillator and Synchronization ................................................ 11
REVISION HISTORY
8/15—Rev. 0 to Rev. A
Changes to General Description Section and Figure 1 ............... 1
Change to Figure 23 ....................................................................... 11
7/15—Revision 0: Initial Version
Data Sheet
Internal Regulators..................................................................... 11
Precision Enabling ..................................................................... 11
Soft Start ...................................................................................... 12
Slew Rate Control....................................................................... 12
Current-Limit Protection ............................................................ 12
Overvoltage Protection.............................................................. 12
Thermal Shutdown .................................................................... 12
Applications Information .............................................................. 13
ADIsimPower Design Tool ....................................................... 13
Component Selection ................................................................ 13
Common Applications .............................................................. 16
Layout Considerations............................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
Rev. A | Page 2 of 18


3Pages


ADP5075 電子部品, 半導体
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
PVIN, AVIN
SW
GND
VREG
EN, FB, SYNC/FREQ
COMP, SLEW, SS, VREF
Operating Junction
Temperature Range
Storage Temperature
Range
Soldering Conditions
Rating
−0.3 V to +18 V
PVIN − 40 V to PVIN + 0.3 V
−0.3 V to +0.3 V
−0.3 V to lower of AVIN + 0.3 V or +6 V
−0.3 V to +6 V
−0.3 V to VREG + 0.3 V
−40°C to +125°C
−65°C to +150°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ADP5075
THERMAL RESISTANCE
θJA is based on a 4-layer printed circuit board (PCB) (two
signals and two power planes) as recommended in the Layout
Considerations section. θJC is measured at the top of the
package and is independent of the PCB.
Table 4. Thermal Resistance
Package Type
θJA
12-Ball WLCSP
68.3
θJC Unit
1.2 °C/W
ESD CAUTION
Rev. A | Page 5 of 18

6 Page



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