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ADM1169 の電気的特性と機能

ADM1169のメーカーはAnalog Devicesです、この部品の機能は「Super Sequencer」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADM1169
部品説明 Super Sequencer
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADM1169 Datasheet, ADM1169 PDF,ピン配置, 機能
Data Sheet
Super Sequencer with Margining Control
and Nonvolatile Fault Recording
ADM1169
FEATURES
Complete supervisory and sequencing solution for up to
8 supplies
16-event deep black box nonvolatile fault recording
8 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0% accuracy across all voltages and temperatures
4 selectable input attenuators allow supervision of supplies to
14.4 V on VH and 6 V on VP1 to VP3 (VPx)
4 dual-function inputs, VX1 to VX4 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
8 programmable driver outputs, PDO1 to PDO8 (PDOx)
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open-collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
NFET (PDO1 to PDO6 only)
SE implements state machine control of PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage margining solution for 4 voltage rails
4 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
Reference input (REFIN) has 2 input options
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved ADC
performance
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 32-lead LQFP and 40-lead LFCSP packages
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
AGND
FUNCTIONAL BLOCK DIAGRAM
REFIN REFOUT REFGND SDA SCL A1 A0
ADM1169
VREF
SMBus
INTERFACE
12-BIT
SAR ADC
CLOSED-LOOP
MARGINING SYSTEM
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
FAULT
RECORDING
EEPROM
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE OF
DRIVING GATES
OF NFET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
VOUT VOUT VOUT VOUT
DAC DAC DAC DAC
VDD
ARBITRATOR
PDOGND
VDDCAP
DAC1 DAC2 DAC3 DAC4
VCCP
Figure 1.
GENERAL DESCRIPTION
GND
The ADM1169 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple supply systems. In addition
to these functions, the ADM1169 integrates a 12-bit ADC and
four 8-bit voltage output DACs. These circuits can be used to
implement a closed-loop margining system that enables supply
adjustment by altering either the feedback node or reference of
a dc-to-dc converter using the DAC outputs.
Supply margining can be performed with a minimum of external
components. The margining loop can be used for in-circuit
testing of a board during production (for example, to verify
board functionality at −5% of nominal supplies), or it can be
used dynamically to accurately control the output voltage of
a dc-to-dc converter.
For more information about the ADM1169 register map, refer
to the AN-721 Application Note.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 Page





ADM1169 pdf, ピン配列
ADM1169
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Detailed Block Diagram .................................................................. 3
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Powering the ADM1169 ................................................................ 13
Slew Rate Consideration............................................................ 13
Inputs................................................................................................ 14
Supply Supervision..................................................................... 14
Programming the Supply Fault Detectors............................... 14
Input Comparator Hysteresis.................................................... 15
Input Glitch Filtering ................................................................. 15
Supply Supervision with VXx Inputs....................................... 16
VXx Pins as Digital Inputs ........................................................ 16
Outputs ............................................................................................ 17
Supply Sequencing Through Configurable Output Drivers.......17
Default Output Configuration.................................................. 17
Sequencing Engine ......................................................................... 18
Overview...................................................................................... 18
Warnings...................................................................................... 18
SMBus Jump (Unconditional Jump)........................................ 18
REVISION HISTORY
1/15—Rev. A to Rev. B
Changes to Table 4............................................................................ 8
Added Slew Rate Consideration Section ..................................... 13
8/13—Rev. 0 to Rev. A
Change to Table 12 ......................................................................... 28
4/11—Revision 0: Initial Version
Data Sheet
Sequencing Engine Application Example ............................... 19
Fault and Status Reporting........................................................ 20
Nonvolatile Black Box Fault Recording................................... 20
Black Box Writes with No External Supply ............................ 21
Voltage Readback............................................................................ 22
Supply Supervision with the ADC ........................................... 22
Supply Margining ........................................................................... 23
Overview ..................................................................................... 23
Open-Loop Supply Margining ................................................. 23
Closed-Loop Supply Margining ............................................... 23
Writing to the DACs .................................................................. 24
Choosing the Size of the Attenuation Resistor....................... 24
DAC Limiting and Other Safety Features ............................... 24
Applications Diagram .................................................................... 25
Communicating with the ADM1169........................................... 26
Configuration Download at Power-Up................................... 26
Updating the Configuration ..................................................... 26
Updating the Sequencing Engine............................................. 27
Internal Registers........................................................................ 27
EEPROM ..................................................................................... 27
Serial Bus Interface..................................................................... 28
SMBus Protocols for RAM and EEPROM.............................. 29
Write Operations ........................................................................ 30
Read Operations......................................................................... 31
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
Rev. B | Page 2 of 33


3Pages


ADM1169 電子部品, 半導体
Data Sheet
Parameter
ANALOG-TO-DIGITAL CONVERTER
Signal Range
Input Reference Voltage on REFIN Pin, VREFIN
Resolution
INL
Gain Error
Conversion Time
Offset Error
Input Noise
BUFFERED VOLTAGE OUTPUT DACS
Resolution
Code 0x80 Output Voltage
Range 1
Range 2
Range 3
Range 4
Output Voltage Range
LSB Step Size
INL
DNL
Gain Error
Maximum Load Current (Source)
Maximum Load Current (Sink)
Maximum Load Capacitance
Settling Time into 50 pF Load
Load Regulation
PSRR
REFERENCE OUTPUT
Reference Output Voltage
Load Regulation
Minimum Load Capacitance
PSRR
ADM1169
Min
0
0.592
0.796
0.996
1.246
2.043
1
Typ Max Unit Test Conditions/Comments
2.048
12
0.44
84
0.25
VREFIN
±2.5
±0.05
±2
V
V
Bits
LSB
%
ms
ms
LSB
LSBrms
The ADC can convert signals presented to the
VH, VPx, and VXx pins; VPx and VH input signals
are attenuated depending on the selected
range; a signal at the pin corresponding to the
selected range is from 0.573 V to 1.375 V at the
ADC input
Endpoint corrected, VREFIN = 2.048 V
VREFIN = 2.048 V
One conversion on one channel
All eight channels selected, averaging enabled
VREFIN = 2.048 V
Direct input (no attenuator)
8 Bits
0.6
0.8
1
1.25
601.25
2.36
100
100
2.5
60
40
0.603
0.803
1.003
1.253
±0.75
±0.4
1
50
2
V
V
V
V
mV
mV
LSB
LSB
%
μA
μA
pF
μs
mV
dB
dB
Four DACs are individually selectable for
centering on one of four output voltage ranges
Same range, independent of center point
Endpoint corrected
Per mA
DC
100 mV step in 20 ns with 50 pF load
2.048
−0.25
+0.25
60
2.053
V
mV
mV
μF
dB
No load
Sourcing current, IDACxMAX = −100 μA
Sinking current, IDACxMAX = +100 μA
Capacitor required for decoupling, stability
DC
Rev. B | Page 5 of 33

6 Page



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