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IDT70V9359L の電気的特性と機能

IDT70V9359LのメーカーはIDTです、この部品の機能は「HIGH-SPEED 3.3V 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IDT70V9359L
部品説明 HIGH-SPEED 3.3V 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
メーカ IDT
ロゴ IDT ロゴ 




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IDT70V9359L Datasheet, IDT70V9359L PDF,ピン配置, 機能
HIGH-SPEED 3.3V 8/4K x 18
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM
IDT70V9359/49L
Features:
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 6.5/7.5/9ns (max.)
– Industrial: 7.5ns (max.)
Low-power operation
– IDT70V9359/49L
Active: 450mW (typ.)
Standby: 1.5mW (typ.)
Flow-Through or Pipelined output mode on either port via
the FT/PIPE pins
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
Functional Block Diagram
Full synchronous operation on both ports
– 3.5ns setup to clock and 0ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 6.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 10ns cycle time, 100MHz operation in Pipelined output mode
Separate upper-byte and lower-byte controls for
multiplexed bus and bus matching compatibility
LVTTL- compatible, single 3.3V (±0.3V) power supply
Industrial temperature range (–40°C to +85°C) is
available for 83 MHz
Available in a 100-pin Thin Quad Flatpack (TQFP) and 100-
pin Fine Pitch Ball Grid Array (fpBGA) packages.
R/WL
UBL
CE0L
CE1L
LBL
OEL
1
0
0/1
FT/PIPEL
I/O9L-I/O17L
I/O0L-I/O8L
A12L(1)
A0L
CLKL
ADSL
CNTENL
CNTRSTL
0/1 1b 0b b a 1a 0a
Counter/
Address
Reg.
I/O
Control
I/O
Control
MEMORY
ARRAY
1
0
0/1
0a 1a a b0b 1b 0/1
Counter/
Address
Reg.
NOTE:
1. A12 is a NC for IDT70V9349.
R/WR
UBR
CE0R
CE1R
LBR
OER
FT/PIPER
I/O9R-I/O17R
I/O0R-I/O8R
A12R(1)
A0R
CLKR
ADSR
CNTENR
CNTRSTR
5638 drw 01
©2003 Integrated Device Technology, Inc.
1
AUGUST 2003
DSC-5638/3

1 Page





IDT70V9359L pdf, ピン配列
IDT70V9359/49L
High-Speed 3.3V 8/4K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Pin Configurations(cont'd)(1,2,3,4)
70V9359/49BF
BF100(5)
07/03/02
100-Pin fpBGA
Top View(6)
A1 A2
A3 A4
A5 A6 A7
A8 A9
A10
A8R A11R UBR CNTRSTR Vss Vss Vss I/O13R I/O10R I/O17R
B1 B2 B3 B4 B5 B6 B7
B8 B9 B10
A6R A7R A10R A12R(1) R/WR OER PL/FTR I/O12R I/O9R I/O6R
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10
A3R A4R A5R A9R CE1R I/O16R I/O15R I/O11R I/O7R I/O3R
D1 D2 D3 D4 D5 D6 D7 D8 D9 D10
A0R CLKR A1R A2R LBR CE0R I/O14R I/O8R I/O5R I/O1R
E1 E2 E3 E4 E5 E6 E7 E8 E9 E10
Vss ADSR CNTENR A1L ADSL Vss I/O4R I/O2R I/O0R VDD
F1 F2 F3 F4 F5 F6 F7 F8 F9 F10
Vss CLKL A0L A3L VDD Vss VDD I/O2L I/O1L I/O0L
G1 G2 G3 G4 G5 G6 G7 G8 G9 G10
CNTENL A4L A7L UBL Vss I/O13L NC I/O4L Vss I/O3L
H1 H2 H3 H4 H5
H6 H7 H8 H9 H10
A2L A6L A11L CE0L CNTRSTL I/O15L I/O9L I/O7L I/O6L I/O5L
J1 J2 J3 J4 J5 J6 J7 J8 J9 J10
A5L A9L A12L(1) R/WL OEL PL/FTL I/O12L I/O10L Vss I/O8L
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10
A8L A10L LBL CE1L VDD VDD I/O16L I/O14L I/O11L I/O17L
5638 drw 03
NOTES:
1. A12 is a NC for IDT70V9349.
2. All VDD pins must be connected to power supply.
3. All VSS pins must be connected to ground supply.
4. Package body is approximately 10mm x 10mm x 1.4mm with 0.8mm ball pitch.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part-marking.
,
6.432


3Pages


IDT70V9359L 電子部品, 半導体
IDT70V9359/49L
High-Speed 3.3V 8/4K x 18 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range ( VDD= 3.3V ± 0.3V)
Symbol
Parameter
|ILI| Input Leakage Current(1)
|ILO| Output Leakage Current
VOL Output Low Voltage
VOH Output High Voltage
Test Conditions
VDD = 3.6V, VIN = 0V to VDD
CE = VIH or CE1 = VIL, VOUT = 0V to VDD
IOL = +4mA
IOH = -4mA
NOTE:
1. At VDD < 2.0V input leakages are undefined.
70V9359/49L
Min. Max. Unit
___ 5 µA
___ 5 µA
___ 0.4 V
2.4 ___ V
5638 tbl 08
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range(3) (VDD = 3.3V ± 0.3V)
70V9359/49L6
Com'l Only
70V9359/49L7
Com'l & Ind
70V9359/49L9
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ.(4)
Max. Typ.(4) Max. Typ.(4) Max. Unit
IDD Dynamic Operating CEL and CER= VIL,
Current (Both
Outputs Disabled,
Ports Active)
f = fMAX(1)
COM'L L 175 330 155 280 135 230 mA
IND
L ____
____
155 330
____
____
ISB1 Standby Current CEL = CER = VIH
(Both Ports - TTL
Level Inputs)
f = fMAX(1)
COM'L L 50 80 40 70 30 60 mA
IND
L ____
____
40
80 ____ ____
ISB2 Standby
Current (One
Port - TTL
Level Inputs)
CE"A" = VIL and
CE"B" = VIH(5)
Active Port Outputs
Disabled, f=fMAX(1)
COM'L L 115 185 105 170 95 155 mA
IND L ____ ____ 105 180 ____ ____
ISB3 Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports CEL and
CER >VDD - 0.2V,
VIN > VDD- 0.2V or
VIN < 0.2V, f = 0(2)
COM'L L 0.5 3.0 0.5 3.0 0.5 3.0 mA
IND L ____ ____ 0.5 3.0 ____ ____
ISB4 Full Standby
Current (One
Port - CMOS
Level Inputs)
CE"A" < 0.2V and
COM'L L 105
175
95
160
85
145 mA
CE"B" > VDD - 0.2V(5)
VIN > VDD- 0.2V or
IND L
VIN < 0.2V, Active Port,
____ ____ 95 175 ____ ____
Outputs Disabled , f = fMAX(1)
5638 tbl 09
NOTES:
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. VDD = 3.3V, TA = 25°C for Typ, and are not production tested. ICC DC(f=0) = 90mA (Typ).
5. CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDD - 0.2V
CEX > VDD - 0.2V means CE0X > VDD - 0.2V or CE1X < 0.2V
"X" represents "L" for left port or "R" for right port.
6.462

6 Page



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部品番号部品説明メーカ
IDT70V9359

HIGH-SPEED 3.3V 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

IDT
IDT
IDT70V9359L

HIGH-SPEED 3.3V 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

IDT
IDT


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